Routing Congestion In Vlsi Circuits: Estimation And Optimization

Saxena, Prashant; Shelar, Rupesh S.; Sapatnekar, Sachin

ISBN 10: 0387300376 / ISBN 13: 9780387300375

Editore: Springer, 2007

This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide. Codice articolo ABBB-71660

Riassunto:

With dramatic increases in on-chip packing densities, routing congestion has become a major problem in integrated circuit design, impacting convergence, performance, and yield, and complicating the synthesis of critical interc- nects.

Dalla quarta di copertina:

With the dramatic increases in on-chip packing densities, routing congestion has become a major problem in chip design. The problem is especially acute as interconnects are also the performance bottleneck in integrated circuits. The solution lies in judicious resource management. This involves intelligent allocation of the available interconnect resources, up-front planning of the wire routes for even wire distributions, and transformations that make the physical synthesis flow congestion-aware.

Routing Congestion in VLSI Circuits: Estimation and Optimization provides the reader with a complete understanding of the root causes of routing congestion in present-day and future VLSI circuits, available techniques for estimating and optimizing this congestion, and a critical analysis of the accuracy and effectiveness of these techniques, so that the reader may prudently choose an approach that is appropriate to their design goals. The scope of the work includes metrics and optimization techniques for routing congestion at various stages of the VLSI design flow, including the architectural level, the logic synthesis/technology mapping level, the placement phase, and the routing step. A particular focus of this work is on the congestion issues that deal primarily with standard cell based design.

Routing Congestion in VLSI Circuits: Estimation and Optimization is a valuable reference for CAD developers and researchers, design methodology engineers, VLSI design and CAD students, and VLSI design engineers.

Dati bibliografici

Titolo: Routing Congestion In Vlsi Circuits: ...
Casa editrice: Springer
Data di pubblicazione: 2007
Legatura: Rilegato
Condizione: New