In Search of the Next Memory: Inside the Circuitry from the Oldest to the Emerging Non-Volatile Memories

This book provides students and practicing chip designers with an easy-to-follow yet thorough, introductory treatment of the most promising emerging memories under development in the industry.  Focusing on the chip designer rather than the end user, this book offers expanded, up-to-date coverage of emerging memories circuit design. After an introduction on the old solid-state memories and the fundamental limitations soon to be encountered, the working principle and main technology issues of each of the considered technologies (PCRAM, MRAM, FeRAM, ReRAM) are reviewed and a range of topics related to  design is explored: the array organization, sensing and writing circuitry, programming algorithms and  error correction techniques are reviewed comparing the approach followed and the constraints for each of the technologies considered.  Finally the issue of radiation effects on memory devices has been briefly treated. Additionally some considerations are entertained about how emerging memories can find a place in the new memory paradigm required by future electronic systems. This book is an up-to-date and comprehensive introduction for students in courses on memory circuit design or advanced digital courses in VLSI or CMOS circuit design. It also serves as an essential, one-stop resource for academics, researchers and practicing engineers.

Giovanni Campardo was born in Bergamo, Italy, in 1958. He received the laurea degree in Nuclear Engineering from the Politecnico of Milan in 1984. In 1997 he graduated in physics from the Universita’ Statale di Milano, Milan.

After a short experience in the field of laser in 1984, he joined in the VLSI division of SGS (now STMicroelectronics) Milan, where, as a Project Leader, he designed the family of EPROM nMOS devices (512k, 256k, 128k and 64k) and a Look-up-table-based EPROM FIR in CMOS technology. From 1988 to 1992, after resigning from STMicroelectronics, he worked as an ASIC designer, realizing four devices. In 1992 he joined STMicroelectronics again, concentrating on Flash memory design for the microcontroller division, as a Project leader. Here he has realized a Flash + SRAM memory device for automotive applications and two embedded Flash memories (256k and 1M) for ST10 microcontroller family. Since 1994 he has been responsible for Flash memory design inside the Memory Division of SGS-Thomson Microelectronics where he has realized two double-supply Flash Memories (2M and 4M) and the single supply 8M at 1.8V. He was the Design Manager for the 64M multilevel Flash project. Up to the end of 2001 he was the Product Development Manager for the Mass Storage Flash Devices in STMicroelectronics Flash Division realizing the 128M multilevel Flash and a test pattern to store more than 2bit/cell. From 2002 to 2007, inside the ST Wireless Flash Division, he had the responsibility of building-up a team to develop 3D Integration in the direction of System-in-Package solutions. From 2007 to 2010 he was the Director of the Card Business Unit inside the Numonyx DATA NAND Flash Group. In 2010 Micron acquired Numonyx and, after a short time in Micron he moved in a company, as Design Director, for the EWS testing board design. In 2013 he joint Micron again as MANAGED MEMORY SYSTEMS MANAGER. From September 2014 he is in STM, in the Automotive Product Group, in the R&D design group.

He is author/co-author of more than 100 patents and some publications and author/co-author of the books: "Flash Memories", Kluwer Academic Publishers, 1999, and the book “Floating Gate Devices: Operation and Compact Modeling”, Kluwer Academic Publishers, January 2004. Author of the book “Design of Non Volatile Memory”, Franco Angeli, 2000, and “VLSI-Design of Non-Volatile Memories”, Springer Series in ADVANCED MICROELECTRONICS, 2005.  “Memorie in Sistemi Wireless”, Franco Angeli Editore, collana scientifica, serie di Informatica, 2005. “Memories in Wireless Systems”, in CIRCUITS AND SYSTEMS, Springer Verlag, 2008. G. Campardo, F. Tiziani, M. Iaculo “Memory Mass Storage”, Springer Verlag, March 2011. He was the Co-Chairs for the “System-In-Package-Technologies” Panel discussion for the IEEE 2003 Non-Volatile Semiconductor Memory Workshop, 19th IEEE NVSMW, Monterey; Ca.  Mr. Campardo was the co-Guest Editor for the Proceeding of the IEEE, April 2003, Special issue on Flash Memory and the co-Guest Editor for the Proceeding of the IEEE, Special issue on 3D Integration Technology, January 2009. He was lecturer in the “Electronic Lab” course at the University Statale of Milan from ’96 to ’98.  In 2003, 2004 and 2005 he was the recipient for the “ST Exceptional Patent Award".