Silicon-On-Insulator (Soi) Technology

O. Kononchuk

ISBN 10: 0857095269 / ISBN 13: 9780857095268

Editore: Elsevier Science Jun 2014, 2014

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This item is printed on demand - it takes 3-4 days longer - Neuware -Silicon-On-Insulator (SOI) Technology: Manufacture and Applications covers SOI transistors and circuits, manufacture, and reliability. The book also looks at applications such as memory, power devices, and photonics. The book is divided into two parts; part one covers SOI materials and manufacture, while part two covers SOI devices and applications. The book begins with chapters that introduce techniques for manufacturing SOI wafer technology, the electrical properties of advanced SOI materials, and modeling short-channel SOI semiconductor transistors. Both partially depleted and fully depleted SOI technologies are considered. Chapters 6 and 7 concern junctionless and fin-on-oxide field effect transistors. The challenges of variability and electrostatic discharge in CMOS devices are also addressed. Part two covers recent and established technologies. These include SOI transistors for radio frequency applications, SOI CMOS circuits for ultralow-power applications, and improving device performance by using 3D integration of SOI integrated circuits. Finally, chapters 13 and 14 consider SOI technology for photonic integrated circuits and for micro-electromechanical systems and nano-electromechanical sensors. The extensive coverage provided by Silicon-On-Insulator (SOI) Technology makes the book a central resource for those working in the semiconductor industry, for circuit design engineers, and for academics. It is also important for electrical engineers in the automotive and consumer electronics sectors. 496 pp. Englisch.

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Dati bibliografici

• Titolo: Silicon-On-Insulator (Soi) Technology
• Editore: Elsevier Science Jun 2014
• Data di pubblicazione: 2014
• Lingua: Inglese
• ISBN 10: 0857095269
• ISBN 13: 9780857095268
• Rilegatura: Buch
• Condizione: Neu

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Riassunto

Silicon-on-insulator (SOI) is a semiconductor wafer technology that produces higher performing, lower power devices than traditional bulk silicon techniques. SOI works by placing a thin, insulating layer, such as silicon oxide between a thin layer of silicon and the silicon substrate. This process helps reduce junction capacitance, resulting in higher speed and lower power consumption. SOI chips can be as much as 15 percent faster and use 20 percent less power than todays silicon complementary metal-oxide semiconductor (CMOS)-based chips. Part one covers SOI transistors and circuits, manufacture and reliability and part two looks at applications such as memory, power devices and photonics.

Informazioni sull?autore

Bich-Yen Nguyen is a Senior Fellow at SOITEC USA, where she is responsible for their R&D projects. She also provides support for the development of new fields and applications for SOITEC's core technologies.

Oleg Kononchuk is Chief Scientist at SOITEC, France. His research interests are in discovering new processes and metrology developments for the manufacture of silicon-on-insulator wafers.