Switched Capacitor A/D Converter Based on Butterworth Filter Implementation : How to Design Sigma-Delta Analog to Digital Converter

Ming-Shiung Tsai

ISBN 10: 3639001605 / ISBN 13: 9783639001600

Editore: VDM Verlag Dr. Müller, VDM Verlag Dr. Müller E.K., 2008

Riguardo questo articolo

Neuware - In this work, we present a fourth-order cascade-of-integrators feedback Sigma-Delta A/D converter. We use Oversampling and Noise-Shaping techniques to earn a higher resolution than that in the Nyquist-Rate A/D converters. A generic method is presented to make the system stabilized. In order to fix the zeros and poles in the unit circle, we use MATLAB to design the Butterworth high pass filter, and then the coefficients could be obtained. We present a complete design flow to decrease the time of the design. By applying this method, a fourth-order Sigma-Delta A/D converter is implemented by TSMC 0.35 m 2P4M Mixed-Signal Polycide process provided by National Chip Implementation Center. The circuit specification is as follows: the supply voltage is 3.3 V, the sampling rate is 256, the signal bandwidth is 20k Hz, the working frequency is 10.24Meg Hz, an SNR, 75.7dB is attained, and the total power consumption is 20.3 mW.

Codice articolo 9783639001600

Dati bibliografici

• Titolo: Switched Capacitor A/D Converter Based on Butterworth Filter Implementation : How to Design Sigma-Delta Analog to Digital Converter
• Editore: VDM Verlag Dr. Müller, VDM Verlag Dr. Müller E.K.
• Data di pubblicazione: 2008
• Lingua: Inglese
• ISBN 10: 3639001605
• ISBN 13: 9783639001600
• Rilegatura: Taschenbuch
• Condizione: Neu

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Riassunto

In this work, we present a fourth-order cascade-of-integrators feed­back Sigma-Delta A/D converter. We use Oversampling and Noise-Shaping techniques to earn a higher resolution than that in the Nyquist-Rate A/D converters. A generic method is presented to make the system stabilized. In order to fix the zeros and poles in the unit circle, we use MATLAB to design the Butterworth high pass filter, and then the coefficients could be obtained. We present a complete design flow to decrease the time of the design. By applying this method, a fourth-order Sigma-Delta A/D converter is implemented by TSMC 0.35 µm 2P4M Mixed-Signal Polycide process provided by National Chip Implementation Center. The circuit specification is as follows: the supply voltage is 3.3 V, the sampling rate is 256, the signal bandwidth is 20k Hz, the working frequency is 10.24Meg Hz, an SNR, 75.7dB is attained, and the total power consumption is 20.3 mW.