System Level Design from Hw/Sw to Memory for Embedded Systems : 5th Ifip Tc 10 International Embedded Systems Symposium, Iess 2015, Foz Do Iguaçu, Brazil, November 3?6, 2015, Proceedings. Questo articolo non è disponibile.
Götz, Marcelo (EDT); Schirner, Gunar (EDT); Wehrmeister, Marco Aurélio (EDT); Al Faruque, Mohammad Abdullah (EDT); Rettberg, Achim (EDT)
Lingua: inglese
Editore: Springer, 2018
Serie: Libro 176 di 292 - IFIP Advances in Information and Communication Technology
- Rilegato
- Nuovo
Da: GreatBookPrices, Columbia, MD, U.S.A.GreatBookPrices
Venditore AbeBooks dal 6 aprile 2009
Condizione: Nuovo
EUR 53,71
Codice articolo 32712349-n
- Titolo
- System Level Design from Hw/Sw to Memory for Embedded Systems : 5th Ifip Tc 10 International Embedded Systems Symposium, Iess 2015, Foz Do Iguaçu, Brazil, November 3?6, 2015, Proceedings
- Autore
- Götz, Marcelo (EDT); Schirner, Gunar (EDT); Wehrmeister, Marco Aurélio (EDT); Al Faruque, Mohammad Abdullah (EDT); Rettberg, Achim (EDT)
- Editore
- Springer
- Anno di pubblicazione
- 2018
- Condizione
- New
- Rilegatura
- Rilegato
- Lingua
- inglese
- ISBN 10
- 3319900226
- ISBN 13
- 9783319900223
- Serie
- Libro 176 di 292: IFIP Advances in Information and Communication Technology
This book constitutes the refereed proceedings of the 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, held in Foz do Iguaçu, Brazil, in November 2015.
The 18 full revised papers presented were carefully reviewed and selected from 25 submissions. The papers present a broad discussion on the design, analysis and verification of embedded and cyber-physical systems including design methodologies, verification, performance analysis, and real-time systems design. They are organized in the following topical sections: cyber-physical systems, system-level design; multi/many-core system design; memory system design; and embedded HW/SW design and applications.
"Riassunto" può appartenere a un’altra edizione di questo titolo.