Titolo: System-Level Synthesis (NATO Science Series E: Applied Sciences, 357)
Editore: Kluwer Academic
Data di pubblicazione: 1999
Lingua: Inglese
ISBN 10: 0792357485
ISBN 13: 9780792357483
Rilegatura: Rilegato
Condizione: New

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Riassunto

System-Level Synthesis deals with the concurrent design of electronic applications, including both hardware and software. The issue has become the bottleneck in the design of electronic systems, including both hardware and software, in several major industrial fields, including telecommunications, automotive and aerospace engineering. The major difficulty with the subject is that it demands contributions from several research fields, including system specification, system architecture, hardware design, and software design. Most existing book cover well only a few aspects of system-level synthesis. The present volume presents a comprehensive discussion of all the aspects of system-level synthesis. Each topic is covered by a contribution written by an international authority on the subject.

Contenuti

Preface. Models for System-Level Synthesis. 1. Embedded System Architectures; R. Ernst. Models of Computation for Embedded System Design; L. Lavagno, et al. 3. Multilanguage Specification for System Design; A.A. Jerraya, et al. 4. High-Level Specification Languages for Embedded System Design; C.D. Kloos, et al. 5. Towards A New System Level Design Language - SLDL; S.E. Schulz. Techniques for System-Level Synthesis. 6. Hardware/Software Co-Synthesis Algorithms; W. Wolf. 7. Rapid Prototyping, Emulation and Hardware-Software Co-Debugging; W. Rosenstiel. 8. Dynamic Power Management of Electronic Systems; G. De Micheli, et al. 9. Compiler Generation Techniques for Embedded Processors and their Application to HW/SW Codesign; M. Imai, et al. Methodologies and Tools for System-Level Synthesis. 10. IP-Centric Methodology and Design with the SpecC Language System Level Design of Embedded Systems; D.D. Gajski, et al. 11. The Java Time Approach to Mixed Hardware-Software System Design; J.S. Young, et al. 12. Models and Methods for HW/SW Intellectual Property Interfacing; R.B. Ortega, et al. Index.

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