SystemVerilog for Design Second Edition (Hardcover)

Stuart Sutherland

18 valutazioni di Goodreads

Lingua: inglese

Editore: Springer-Verlag New York Inc., New York, NY, 2006

0387333991 / 9780387333991

Da: Grand Eagle Retail, Bensenville, IL, U.S.A.Grand Eagle Retail

Venditore con 5 stelle

Venditore AbeBooks dal 12 ottobre 2005

Rilegato

Condizione: Nuovo

EUR 247,51

 Spedizione gratuita 
Spedito in U.S.A.

Quantità: 1 disponibile

Aggiungi al carrello
Resi gratuiti per 30 giorni

Descrizione dell’articolo da parte del venditore

Hardcover. SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL-based design. First, modeling very large designs with concise, accurate, and intuitive code. Second, writing high-level test programs to efficiently and effectively verify these large designs.The first edition of this book addressed the first aspect of the SystemVerilog extensions to Verilog. Important modeling features were presented, such as two-state data types, enumerated types, user-degined types, structures, unions, and interfaces. Emphasis was placed on the proper usage of these enhancements for simulation and synthesis.SystemVerilog for Design, Second Edition has been extensively revised on a chapter by chapter basis to include the many text and example updates needed to reflect changes that were made between the first edition of this book was written and the finalization of the new standard. It is important that the book reflect these syntax and semantic changes to the SystemVerilog language.In addition, the second edition features a new chapter that explanis the SystemVerilog "packages", a new appendix that summarizes the synthesis guidelines presented throughout the book, and all of the code examples have been updated to the final syntax and rerun using the latest version of the Synopsys, Mentor, and Cadance tools. In its updated second edition, this book has been rewritten chapter-by-chapter to accurately reflect the syntax and semantic changes to the SystemVerilog language standard, making it an essential reference for systems professionals who need the latest version information Shipping may be from multiple locations in the US or from the UK, depending on stock availability.…

Codice articolo 9780387333991

Titolo
SystemVerilog for Design Second Edition (Hardcover)
Autore
Stuart Sutherland
Editore
Springer-Verlag New York Inc., New York, NY
Anno di pubblicazione
2006
Condizione
new
Rilegatura
Hardcover
Lingua
inglese
ISBN 10
0387333991
ISBN 13
9780387333991
Edizione
seconda edizione

Grand Eagle Retail

Bensenville, IL, U.S.A.

Venditore con 5 stelle

Venditore AbeBooks dal 12 ottobre 2005

Tariffe di spedizione nazionale per U.S.A.

ArticoloDa 6 a 14 giorni lavorativiDa 6 a 16 giorni lavorativi
Primo articoloEUR 0,00EUR 0,00
I tempi di consegna sono stabiliti dai venditori e variano in base al corriere e al paese. Gli ordini che devono attraversare una dogana possono subire ritardi e spetta agli acquirenti pagare eventuali tariffe o dazi associati. I venditori possono contattarti in merito ad addebiti aggiuntivi dovuti a eventuali maggiorazioni dei costi di spedizione dei tuoi articoli.

Metodi di pagamento

  • Visa
  • Mastercard
  • American Express
  • Carte Bleue
  • Apple Pay
  • Google Pay

Informazioni sull’azienda del venditore

APOLLO ONLINE CORP.

605 Geddes Street
Wilmington, DE U.S.A. 19805