Timing Analysis and Optimization of Sequential Circuits (Paperback)

S. Sapatnekar

Lingua: inglese

Editore: Springer-Verlag New York Inc., New York, NY, 2012

1461375797 / 9781461375791

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Paperback. Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques to design fast, low-power chips with minimum area for increasingly complex systems, while on the economic side there is the vastly increased pressure of time-to-market. These pressures have made the use of CAD tools mandatory in designing complex systems. Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to performance parameters such as power and area. A unified approach to performance analysis and optimization of sequential circuits is presented. The state of the art in timing analysis and optimization techniques is described for circuits using edge-triggered or level-sensitive memory elements. Specific emphasis is placed on two methods that are true sequential timing optimizations techniques: retiming and clock skew optimization. Timing Analysis and Optimization of Sequential Circuits covers the following topics: Algorithms for sequential timing analysis Fast algorithms for clock skew optimization and their applications Efficient techniques for retiming large sequential circuits Coupling sequential and combinational optimizations. Timing Analysis and Optimization of Sequential Circuits is written for graduate students, researchers and professionals in the area of CAD for VLSI and VLSI circuit design. Recent years have seen rapid strides in the level of sophistication of VLSI circuits. On the performance front, there is a vital need for techniques to design fast, low-power chips with minimum area for increasingly complex systems, while on the economic side there is the vastly increased pressure of time-to-market. These pressures have made the use of CAD tools mandatory in designing complex systems. Timing Analysis and Optimization of Sequential Circuits describes CAD algorithms for analyzing and optimizing the timing behavior of sequential circuits with special reference to performance parameters such as power and area. A unified approach to performance analysis and optimization of sequential circuits is presented. The state of the art in timing analysis and optimization techniques is described for circuits using edge-triggered or level-sensitive memory elements. Specific emphasis is placed on two methods that are true sequential timing optimizations techniques: retiming and clock skew optimization. Timing Analysis and Optimization of Sequential Circuits covers the following topics: Algorithms for sequential timing analysis Fast algorithms for clock skew optimization and their applications Efficient techniques for retiming large sequential circuits Coupling sequential and combinational optimizations. Timing Analysis and Optimization of Sequential Circuits is written for graduate students, researchers and professionals in the area of CAD for VLSI and VLSI circuit design. Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability.

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Titolo
Timing Analysis and Optimization of Sequential Circuits (Paperback)
Autore
S. Sapatnekar
Editore
Springer-Verlag New York Inc., New York, NY
Anno di pubblicazione
2012
Condizione
new
Rilegatura
Paperback
Lingua
inglese
ISBN 10
1461375797
ISBN 13
9781461375791

AussieBookSeller

Truganina, VIC, Australia

Venditore con 5 stelle

Venditore AbeBooks dal 22 giugno 2007

Tariffe di spedizione da Australia a U.S.A.

ArticoloDa 25 a 45 giorni lavorativiDa 8 a 14 giorni lavorativi
Primo articoloEUR 31,71EUR 37,71
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