VLSI Design for Video Coding

Lin, Youn-Long Steve; Kao, Chao-Yang; Kuo, Hung-Chih; Chen, Jian-Wen

ISBN 10: 1489983821 / ISBN 13: 9781489983824

Editore: Springer-Verlag New York Inc., 2014

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High definition video requires substantial compression in order to be transmitted or stored economically. This volume presents VLSI design and chip implementation for high definition H.264/AVC video encoding using a state-of-the-art video application. Num Pages: 187 pages, 25 black & white tables, biography. BIC Classification: TJFC; UGC. Category: (G) General (US: Trade). Dimension: 235 x 155 x 10. Weight in Grams: 297. . 2014. Paperback. . . . .

Codice articolo V9781489983824

Dati bibliografici

• Titolo: VLSI Design for Video Coding
• Editore: Springer-Verlag New York Inc.
• Data di pubblicazione: 2014
• Lingua: Inglese
• ISBN 10: 1489983821
• ISBN 13: 9781489983824
• Rilegatura: Brossura
• Condizione: New

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Riassunto

High definition video requires substantial compression in order to be transmitted or stored economically. Advances in video coding standards from MPEG-1, MPEG-2, MPEG-4 to H.264/AVC have provided ever increasing coding efficiency, at the expense of great computational complexity which can only be delivered through massively parallel processing.

This book will present VLSI architectural design and chip implementation for high definition H.264/AVC video encoding, using a state-of-the-art video application, with complete VLSI prototype, via FPGA/ASIC. It will serve as an invaluable reference for anyone interested in VLSI design and high-level (EDA) synthesis for video.

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VLSI Design for Video Coding

By:

Youn-Long Lin

Chao-Yang Kao

Jian-Wen Chen

Hung-Chih Kuo

High definition video requires substantial compression in order to be transmitted or stored economically. Advances in video coding standards from MPEG-1, MPEG-2, MPEG-4 to H.264/AVC have provided ever increasing coding efficiency, at the expense of great computational complexity which can only be delivered through massively parallel processing.

This book presents VLSI architectural design and chip implementation for high definition H.264/AVC video encoding with a complete FPGA prototype. It serves as an invaluable reference for anyone interested in VLSI design for video coding.

Presents state-of-the-art VLSI architectural design and chip implementation for high definition H.264/AVC video encoding;

Employs massively parallel processing to deliver 1080pHD, with efficient design that can be prototyped via FPGA;

Every subsystem is presented from standard specification, algorithmic description, design considerations, timing planning, block diagram to test-bench verification;