Verilog: Frequently Asked Questions: Language, Applications and Extensions

Chonnad, Shivakumar S. S.; Balachander, Needamangalam B.

ISBN 10: 1441919864 / ISBN 13: 9781441919861

Editore: Springer, 2010

Riguardo questo articolo

Codice articolo ABLIING23Mar2411530293795

Dati bibliografici

Titolo: Verilog: Frequently Asked Questions: ...

Casa editrice: Springer

Data di pubblicazione: 2010

Legatura: Brossura

Condizione: New

Descrizione articolo

Riassunto:

The Verilog Hardware Description Language was first introduced in 1984. Over the 20 year history of Verilog, every Verilog engineer has developed his own personal “bag of tricks” for coding with Verilog. These tricks enable modeling or verifying designs more easily and more accurately. Developing this bag of tricks is often based on years of trial and error. Through experience, engineers learn that one specific coding style works best in some circumstances, while in another situation, a different coding style is best. As with any high-level language, Verilog often provides engineers several ways to accomplish a specific task. Wouldn’t it be wonderful if an engineer first learning Verilog could start with another engineer’s bag of tricks, without having to go through years of trial and error to decide which style is best for which circumstance? That is where this book becomes an invaluable resource. The book presents dozens of Verilog tricks of the trade on how to best use the Verilog HDL for modeling designs at various level of abstraction, and for writing test benches to verify designs. The book not only shows the correct ways of using Verilog for different situations, it also presents alternate styles, and discusses the pros and cons of these styles.

Contenuti:

Basic Verilog.- RTL Design.- Verification.- Miscellaneous.- Common Mistakes.- Verilog During Simulation Regressions.