Closing the Power Gap between ASIC & Custom (Hardcover)

David Chinnery

ISBN 10: 0387257632 / ISBN 13: 9780387257631

Editore: Springer-Verlag New York Inc., New York, NY, 2007

Hardcover. This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology.Important topics include:- Microarchitectural techniques to reduce energy per operation- Power reduction with timing slack from pipelining- Analysis of the benefits of using multiple supply and threshold voltages- Placement techniques for multiple supply voltages- Verification for multiple voltage domains- Improved algorithms for gate sizing, and assignment of supply and threshold voltages- Power gating design automation to reduce leakage- Relationships among tatistical timing, power analysis, and parametric yield optimizationDesign examples illustrate that these techniques can improve energy efficiency by two to three times. Explains how to use low power design in an automated design flow, and examine the design time and performance trade-offs. This title includes the latest tools and techniques for low power design applied in an ASIC design flow. It focuses on low power in an automated design methodology. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. Codice articolo 9780387257631

Riassunto:

This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology.

Important topics include:
- Microarchitectural techniques to reduce energy per operation
- Power reduction with timing slack from pipelining
- Analysis of the benefits of using multiple supply and threshold voltages
- Placement techniques for multiple supply voltages
- Verification for multiple voltage domains
- Improved algorithms for gate sizing, and assignment of supply and threshold voltages
- Power gating design automation to reduce leakage
- Relationships among tatistical timing, power analysis, and parametric yield optimization

Design examples illustrate that these techniques can improve energy efficiency by two to three times.

 

Dalla quarta di copertina:

This book carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology.

Important topics include:
- Microarchitectural techniques to reduce energy per operation
- Power reduction with timing slack from pipelining
- Analysis of the benefits of using multiple supply and threshold voltages
- Placement techniques for multiple supply voltages
- Verification for multiple voltage domains
- Improved algorithms for gate sizing, and assignment of supply and threshold voltages
- Power gating design automation to reduce leakage
- Relationships among statistical timing, power analysis, and parametric yield optimization

Design examples illustrate that these techniques can improve energy efficiency by two to three times.

Dati bibliografici

Titolo: Closing the Power Gap between ASIC & Custom ...
Casa editrice: Springer-Verlag New York Inc., New York, NY
Data di pubblicazione: 2007
Legatura: Hardcover
Condizione: new
Edizione: prima edizione