High-Level Power Analysis and Optimization

Raghunathan, Anand; Jha, Niraj K.; Dey, Sujit

ISBN 10: 0792380738 / ISBN 13: 9780792380733

Editore: Springer, 1997

Riguardo questo articolo

a very good hardcover; an ex-library copy with usual markings; internally pages bright and clean; ---------- SATISFACTION GUARANTEED --------- FAST, COURTEOUS SERVICE ------ ALL ORDERS SHIPPED WITH DELIVERY CONFIRMATION; Size: 6 x 9". Codice articolo K56617L12

Dati bibliografici

Titolo: High-Level Power Analysis and Optimization

Casa editrice: Springer

Data di pubblicazione: 1997

Legatura: Hard Cover

Condizione: Very Good

Edizione: First Edition.

Tipologia articolo: Ex-Library

Descrizione articolo

Riassunto:

High-Level Power Analysis and Optimization presents a comprehensive description of power analysis and optimization techniques at the higher (architecture and behavior) levels of the design hierarchy, which are often the levels that yield the most power savings. This book describes power estimation and optimization techniques for use during high-level (behavioral synthesis), as well as for designs expressed at the register-transfer or architecture level.
High-Level Power Analysis and Optimization surveys the state-of-the-art research on the following topics: power estimation/macromodeling techniques for architecture-level designs, high-level power management techniques, and high-level synthesis optimizations for low power.
High-Level Power Analysis and Optimization will be very useful reading for students, researchers, designers, design methodology developers, and EDA tool developers who are interested in low-power VLSI design or high-level design methodologies.

Contenuti:

List of Figures. List of Tables. Preface. 1. Introduction. 2. Background. 3. Architecture-Level Power Estimation. 4. Power Management. 5. High-Level Synthesis for Low Power. 6. Conclusions and Future Work. References. Index.