Testing Static Random Access Memories (Paperback)

Said Hamdioui

ISBN 10: 1441954309 / ISBN 13: 9781441954305

Editore: Springer-Verlag New York Inc., New York, NY, 2010

Riguardo questo articolo

Paperback. Testing Static Random Access Memories covers testing of one of the important semiconductor memories types; it addresses testing of static random access memories (SRAMs), both single-port and multi-port. It contributes to the technical acknowledge needed by those involved in memory testing, engineers and researchers. The book begins with outlining the most popular SRAMs architectures. Then, the description of realistic fault models, based on defect injection and SPICE simulation, are introduced. Thereafter, high quality and low cost test patterns, as well as test strategies for single-port, two-port and any p-port SRAMs are presented, together with some preliminary test results showing the importance of the new tests in reducing DPM level. The impact of the port restrictions (e.g., read-only ports) on the fault models, tests, and test strategies is also discussed. Features: -Fault primitive based analysis of memory faults, -A complete framework of and classification memory faults, -A systematic way to develop optimal and high quality memory test algorithms, -A systematic way to develop test patterns for any multi-port SRAM, -Challenges and trends in embedded memory testing. Features: -Fault primitive based analysis of memory faults, -A complete framework of and classification memory faults, -A systematic way to develop optimal and high quality memory test algorithms, -A systematic way to develop test patterns for any multi-port SRAM, -Challenges and trends in embedded memory testing. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.

Codice articolo 9781441954305

Dati bibliografici

• Titolo: Testing Static Random Access Memories (Paperback)
• Editore: Springer-Verlag New York Inc., New York, NY
• Data di pubblicazione: 2010
• Lingua: Inglese
• ISBN 10: 1441954309
• ISBN 13: 9781441954305
• Rilegatura: Paperback
• Edizione: prima edizione
• Condizione: new

Descrizione articolo

Riassunto

Testing Static Random Access Memories covers testing of one of the important semiconductor memories types; it addresses testing of static random access memories (SRAMs), both single-port and multi-port. It contributes to the technical acknowledge needed by those involved in memory testing, engineers and researchers. The book begins with outlining the most popular SRAMs architectures. Then, the description of realistic fault models, based on defect injection and SPICE simulation, are introduced. Thereafter, high quality and low cost test patterns, as well as test strategies for single-port, two-port and any p-port SRAMs are presented, together with some preliminary test results showing the importance of the new tests in reducing DPM level. The impact of the port restrictions (e.g., read-only ports) on the fault models, tests, and test strategies is also discussed.
Features:
-Fault primitive based analysis of memory faults,
-A complete framework of and classification memory faults,
-A systematic way to develop optimal and high quality memory test algorithms,
-A systematic way to develop test patterns for any multi-port SRAM,
-Challenges and trends in embedded memory testing.

Recensione

From the reviews:

"Static random access memories (SRAMs) enjoy a strategic position in the microelectronic industry. ... This book concentrates on the study of fault modeling, testing and test strategies for SRAMs. ... The book provides a well-written coverage in the area of single-, two- and n-port SRAM testing, fault modeling, and simulation. It is well-organized and very timely. ... The book promises to make valuable contribution to the education of graduate students ... . I highly recommend this book ... ." (Mile Stojcev, Microelectronics Reliability, Vol. 45, 2005)