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  • Lingua: Inglese

    Editore: Elsevier Science Nov 2007, 2007

    0123706165 / 9780123706164

    • Brossura
    • Print on Demand

    Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermaniaBuchWeltWeit Ludwig Meier e.K.

    Venditore con 5 stelle
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    Condizione: Nuovo

    EUR 76,95

    EUR 23,00 spedizione 
    Spedito da Germania a U.S.A.

    Quantità: 2 disponibili

    Buch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book will explain how to verify SoC (Systems on Chip) logic designs using 'formal? and 'semiformal? verification techniques. The critical issue to be addressed is whether the functionality of the design is the one that the designers intended. Simulation has been used for checking the correctness of SoC designs (as in 'functional? verification), but many subtle design errors cannot be caught by simulation. Recently, formal verification, giving mathematical proof of the correctness of designs, has been gaining popularity.For higher design productivity, it is essential to debug designs as early as possible, which this book facilitates. This book covers all aspects of high-level formal and semiformal verification techniques for system level designs. 256 pp. Englisch.…