Hardcover. Condizione: Very Good. No Jacket. May have limited writing in cover pages. Pages are unmarked. ~ ThriftBooks: Read More, Spend Less.
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Aggiungi al carrelloCondizione: New. pp. 260 Figure, 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.
Da: Midway Book Store (ABAA), St. Paul, MN, U.S.A.
Wraps. Condizione: vg+. Hao & Shenyan, Fan & Fan, Li & Bingyaun, Pan & Peng Yim Chee; Photographers Jianquin (illustratore). Oversize paperback. 142pp Exhibition catalogue. A very nice copy.
Da: Basi6 International, Irving, TX, U.S.A.
Condizione: Brand New. New. US edition. Expediting shipping for all USA and Europe orders excluding PO Box. Excellent Customer Service.
Da: Romtrade Corp., STERLING HEIGHTS, MI, U.S.A.
Condizione: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.
hardcover. Condizione: As New. Ships Out Tomorrow!
Da: Books Puddle, New York, NY, U.S.A.
Condizione: Used. pp. 260.
Da: Biblios, Frankfurt am main, HESSE, Germania
EUR 96,40
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Aggiungi al carrelloCondizione: Used. pp. 260, Abbreviations Acknowledgements.
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EUR 110,55
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Condizione: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.
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EUR 122,02
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Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 113,71
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Da: GreatBookPricesUK, Woodford Green, Regno Unito
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EUR 127,45
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Condizione: New. pp. 204.
Condizione: New. pp. 202.
Condizione: New. pp. 152.
Da: Books Puddle, New York, NY, U.S.A.
Condizione: New. pp. 260.
Da: Revaluation Books, Exeter, Regno Unito
EUR 149,77
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Aggiungi al carrelloPaperback. Condizione: Brand New. 227 pages. 9.00x6.00x0.50 inches. In Stock.
Da: Revaluation Books, Exeter, Regno Unito
EUR 150,04
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Aggiungi al carrelloHardcover. Condizione: Brand New. 2011 edition. 150 pages. 9.25x6.25x0.50 inches. In Stock.
Da: preigu, Osnabrück, Germania
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. Design of Very High-Frequency Multirate Switched-Capacitor Circuits | Extending the Boundaries of CMOS Analog Front-End Filtering | Ben U Seng Pan (u. a.) | Taschenbuch | xxxii | Englisch | 2010 | Springer | EAN 9781441938671 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 161,77
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Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 161,77
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EUR 124,02
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Aggiungi al carrelloGebunden. Condizione: New. Design of state-of-the-art and most complex SC Analog Filter in CMOSDetailed circuit and layout optimization technique for very high-frequency CMOS SC circuitsComprehensive signal spectrum and noise analysis with timing-mismatch and non-uni.
Da: AHA-BUCH GmbH, Einbeck, Germania
EUR 112,77
Quantità: 1 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - Design of Very High-Frequency Multirate Switched-Capacitor Circuits presents the theory and the corresponding CMOS implementation of the novel multirate sampled-data analog interpolation technique which has its great potential on very high-frequency analog frond-end filtering due to its inherent dual advantage of reducing the speed of data-converters and DSP core together with the specification relaxation of the post continuous-time filtering. This technique completely eliminates the traditional phenomenon of sampled-and-hold frequency-shaping at the lower input sampling rate. Also, in order to tackle physical IC imperfections at very high frequency, the state-of-the-art circuit design and layout techniques for high-speed Switched-Capacitor (SC) circuits are comprehensively discussed:-Optimum circuit architecture tradeoff analysis-Simple speed and power trade-off analysis of active elements-High-order filtering response accuracy with respect to capacitor-ratio mismatches-Time-interleaved effect with respect to gain and offset mismatch-Time-interleaved effect with respect to timing-skew and random jitter with non-uniformly holding-Stage noise analysis and allocation scheme-Substrate and supply noise reduction-Gain-and offset-compensation techniques-High-bandwidth low-power amplifier design and layout-Very low timing-skew multiphase generationTwo tailor-made optimum design examples in CMOS are presented. The first one achieves a 3-stage 8-fold SC interpolating filter with 5.5MHz bandwidth and 108MHz output sampling rate for a NTSC/PAL CCIR 601 digital video at 3 V. Another is a 15-tap 57MHz SC FIR bandpass interpolating filter with 4-fold sampling rate increase to 320MHz and the first-time embedded frequency band up-translation for DDFS system at 2.5V. The corresponding chip prototype achieves so far the highest operating frequency, highest filter order and highest center frequency with highestdynamic range under the lowest supply voltage when compared to the previously reported high-frequency SC filters in CMOS.
Da: Mispah books, Redhill, SURRE, Regno Unito
EUR 166,75
Quantità: 1 disponibili
Aggiungi al carrelloHardcover. Condizione: Like New. Like New. book.
Da: AHA-BUCH GmbH, Einbeck, Germania
EUR 139,99
Quantità: 1 disponibili
Aggiungi al carrelloGebundene Ausgabe. Condizione: Neu. Neu Neuware, Importqualität, auf Lager, Sofortversand - Analog-to-Digital Converters (ADCs) play an important role in most modern signal processing and wireless communication systems where extensive signal manipulation is necessary to be performed by complicated digital signal processing (DSP) circuitry. This trend also creates the possibility of fabricating all functional blocks of a system in a single chip (System On Chip - SoC), with great reductions in cost, chip area and power consumption. However, this tendency places an increasing challenge, in terms of speed, resolution, power consumption, and noise performance, in the design of the front-end ADC which is usually the bottleneck of the whole system, especially under the unavoidable low supply-voltage imposed by technology scaling, as well as the requirement of battery operated portable devices. Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters will present new techniques tailored for low-voltage and high-speed Switched-Capacitor (SC) ADC with various design-specific considerations.