Hardcover. Condizione: Good. Minor shelf damage on cover.
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Aggiungi al carrelloCondizione: New. In.
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Aggiungi al carrelloCondizione: As New. Unread book in perfect condition.
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EUR 91,91
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EUR 104,50
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Aggiungi al carrelloCondizione: As New. Unread book in perfect condition.
Lingua: Inglese
Editore: Kluwer Academic Publishers, US, 1997
ISBN 10: 0792399277 ISBN 13: 9780792399278
Da: Rarewaves.com USA, London, LONDO, Regno Unito
EUR 132,98
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Aggiungi al carrelloHardback. Condizione: New. A basic, practical, introductory textbook for professionals and students, this text explains how a designer can be more effective through the use of the Verilog hardware description language to simulate and document a design. By understanding simulation, a designer can simulate a design to see if a design works before it is built. This gives the designer an opportunity to try different ideas. Documentation allows a designer to maintain and reuse a design more easily. Verilog's intrinsic hierarchical modularity enables the designer to easily reuse portions of the design as `intellectual property' or `macro-cells'. Some of the formal Verilog syntax are presented here, along with definitions and practical uses. This book does not oversimplify the Verilog language nor does it emphasize theory. However, the book has over 100 examples that are used to illustrate aspects of the language. In the later chapters the focus is on working with modelling style and explaining why and when one would use different elements of the language, and there is a chapter on state machine modelling. There is also a chapter on test benches and testing strategy as well as a chapter on debugging.
EUR 103,03
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Aggiungi al carrelloCondizione: New.
EUR 63,58
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Aggiungi al carrelloCondizione: Sehr gut. Zustand: Sehr gut | Seiten: 332 | Sprache: Englisch | Produktart: Bücher | Keine Beschreibung verfügbar.
EUR 127,29
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Aggiungi al carrelloBuch. Condizione: Neu. Neuware - Verilog® Quickstart is a basic, practical, introductory textbook for professionals and students alike. This book explains how a designer can be more effective through the use of the Verilog hardware description language to simulate and document a design. By understanding simulation, a designer can simulate a design to see if a design works before it is built. This gives the designer an opportunity to try different ideas. Documentation allows a designer to maintain and reuse a design more easily. Verilog's intrinsic hierarchical modularity enables the designer to easily reuse portions of the design as `intellectual property' or `macro-cells'. Verilog® Quickstart presents some of the formal Verilog syntax and definitions and then shows practical uses. This book does not oversimplify the Verilog language nor does it emphasize theory. Verilog® Quickstart has over 100 examples that are used to illustrate aspects of the language. In the later chapters the focus is on working with modeling style and explaining why and when one would use different elements of the language. Another feature of the book is the chapter on state machine modeling. There is also a chapter on test benches and testing strategy as well as a chapter on debugging. Verilog® Quickstart is designed to teach the Verilog language, to show the designer how to model in Verilog and to explain the basics of using Verilog simulators.
Lingua: Inglese
Editore: Kluwer Academic Publishers, US, 1997
ISBN 10: 0792399277 ISBN 13: 9780792399278
Da: Rarewaves.com UK, London, Regno Unito
EUR 124,74
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Aggiungi al carrelloHardback. Condizione: New. A basic, practical, introductory textbook for professionals and students, this text explains how a designer can be more effective through the use of the Verilog hardware description language to simulate and document a design. By understanding simulation, a designer can simulate a design to see if a design works before it is built. This gives the designer an opportunity to try different ideas. Documentation allows a designer to maintain and reuse a design more easily. Verilog's intrinsic hierarchical modularity enables the designer to easily reuse portions of the design as `intellectual property' or `macro-cells'. Some of the formal Verilog syntax are presented here, along with definitions and practical uses. This book does not oversimplify the Verilog language nor does it emphasize theory. However, the book has over 100 examples that are used to illustrate aspects of the language. In the later chapters the focus is on working with modelling style and explaining why and when one would use different elements of the language, and there is a chapter on state machine modelling. There is also a chapter on test benches and testing strategy as well as a chapter on debugging.
Lingua: Inglese
Editore: Kluwer Academic Publishers, 1997
ISBN 10: 0792399277 ISBN 13: 9780792399278
Da: THE SAINT BOOKSTORE, Southport, Regno Unito
EUR 109,19
Quantità: Più di 20 disponibili
Aggiungi al carrelloHardback. Condizione: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days.