ISBN: 9781461286066 - synthesis of power distribution to manage signal integrity in mixed-signal ics (9 risultati)

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  • Lingua: Inglese

    Editore: Springer, 2011

    1461286069 / 9781461286066

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  • Lingua: Inglese

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  • Lingua: Inglese

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    Condizione: New. pp. 236.

  • Lingua: Inglese

    Editore: Springer, 2011

    1461286069 / 9781461286066

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    Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH

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    Taschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks.…

  • Lingua: Inglese

    Editore: Springer, 2011

    1461286069 / 9781461286066

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    Da: Brook Bookstore On Demand, Napoli, NA, ItaliaBrook Bookstore On Demand

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    Condizione: new. Questo è un articolo print on demand.

  • Lingua: Inglese

    Editore: Springer US, Springer New York Sep 2011, 2011

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    Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germaniabuchversandmimpf2000

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    Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 236 pp. Englisch.…

  • Lingua: Inglese

    Editore: Springer, 2011

    1461286069 / 9781461286066

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    Da: Majestic Books, Hounslow, Regno UnitoMajestic Books

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    Condizione: New. Print on Demand pp. 236 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam.

  • Lingua: Inglese

    Editore: Springer US Sep 2011, 2011

    1461286069 / 9781461286066

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    Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermaniaBuchWeltWeit Ludwig Meier e.K.

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    Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks. 236 pp. Englisch.…

  • Lingua: Inglese

    Editore: Springer, 2011

    1461286069 / 9781461286066

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    Da: Biblios, frankfurt am main, HESSE, GermaniaBiblios

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    Condizione: New. PRINT ON DEMAND pp. 236.