Isbn: 9781461367857 - vlsi design of neural networks: 122 (15 risultati)

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  • Lingua: Inglese

    Editore: Springer, 2013

    1461367859 / 9781461367857

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  • Lingua: Inglese

    Editore: Springer 2013-01-21, 2013

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  • Lingua: Inglese

    Editore: Springer, 2013

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  • Lingua: Inglese

    Editore: Springer, 2013

    1461367859 / 9781461367857

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  • Lingua: Inglese

    Editore: Springer, 2013

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    Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH

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    Taschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - The early era of neural network hardware design (starting at 1985) was mainly technology driven. Designers used almost exclusively analog signal processing concepts for the recall mode. Learning was deemed not to cause a problem because the number of implementable synapses was still so low that the determination of weights and thresholds could be left to conventional computers. Instead, designers tried to directly map neural parallelity into hardware. The architectural concepts were accordingly simple and produced the so called interconnection problem which, in turn, made many engineers believe it could be solved by optical implementation in adequate fashion only. Furthermore, the inherent fault-tolerance and limited computation accuracy of neural networks were claimed to justify that little effort is to be spend on careful design, but most effort be put on technology issues. As a result, it was almost impossible to predict whether an electronic neural network would function in the way it was simulated to do. This limited the use of the first neuro-chips for further experimentation, not to mention that real-world applications called for much more synapses than could be implemented on a single chip at that time. Meanwhile matters have matured. It is recognized that isolated definition of the effort of analog multiplication, for instance, would be just as inappropriate on the part ofthe chip designer as determination of the weights by simulation, without allowing for the computing accuracy that can be achieved, on the part of the user.…

  • Lingua: Inglese

    Editore: Springer, 2013

    1461367859 / 9781461367857

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  • Lingua: Inglese

    Editore: Springer, 2013

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  • Lingua: Inglese

    Editore: Springer, 2013

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  • Lingua: Inglese

    Editore: Springer, Springer US Jan 2013, 2013

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    Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermaniaBuchWeltWeit Ludwig Meier e.K.

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    Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The early era of neural network hardware design (starting at 1985) was mainly technology driven. Designers used almost exclusively analog signal processing concepts for the recall mode. Learning was deemed not to cause a problem because the number of implementable synapses was still so low that the determination of weights and thresholds could be left to conventional computers. Instead, designers tried to directly map neural parallelity into hardware. The architectural concepts were accordingly simple and produced the so called interconnection problem which, in turn, made many engineers believe it could be solved by optical implementation in adequate fashion only. Furthermore, the inherent fault-tolerance and limited computation accuracy of neural networks were claimed to justify that little effort is to be spend on careful design, but most effort be put on technology issues. As a result, it was almost impossible to predict whether an electronic neural network would function in the way it was simulated to do. This limited the use of the first neuro-chips for further experimentation, not to mention that real-world applications called for much more synapses than could be implemented on a single chip at that time. Meanwhile matters have matured. It is recognized that isolated definition of the effort of analog multiplication, for instance, would be just as inappropriate on the part ofthe chip designer as determination of the weights by simulation, without allowing for the computing accuracy that can be achieved, on the part of the user. 360 pp. Englisch.…

  • Lingua: Inglese

    Editore: Springer-Verlag New York Inc., 2013

    1461367859 / 9781461367857

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    Paperback / softback. Condizione: New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days.

  • Lingua: Inglese

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    Condizione: New. Print on Demand pp. 360 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam.

  • Lingua: Inglese

    Editore: Springer US, 2013

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    Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. The early era of neural network hardware design (starting at 1985) was mainly technology driven. Designers used almost exclusively analog signal processing concepts for the recall mode. Learning was deemed not to cause a problem because the number of implem. …

  • Lingua: Inglese

    Editore: Springer, 2013

    1461367859 / 9781461367857

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    Da: Biblios, frankfurt am main, HESSE, GermaniaBiblios

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    Condizione: New. PRINT ON DEMAND pp. 360.

  • Lingua: Inglese

    Editore: Springer, Springer Jan 2013, 2013

    1461367859 / 9781461367857

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    Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germaniabuchversandmimpf2000

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    Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The early era of neural network hardware design (starting at 1985) was mainly technology driven. Designers used almost exclusively analog signal processing concepts for the recall mode. Learning was deemed not to cause a problem because the number of implementable synapses was still so low that the determination of weights and thresholds could be left to conventional computers. Instead, designers tried to directly map neural parallelity into hardware. The architectural concepts were accordingly simple and produced the so called interconnection problem which, in turn, made many engineers believe it could be solved by optical implementation in adequate fashion only. Furthermore, the inherent fault-tolerance and limited computation accuracy of neural networks were claimed to justify that little effort is to be spend on careful design, but most effort be put on technology issues. As a result, it was almost impossible to predict whether an electronic neural network would function in the way it was simulated to do. This limited the use of the first neuro-chips for further experimentation, not to mention that real-world applications called for much more synapses than could be implemented on a single chip at that time. Meanwhile matters have matured. It is recognized that isolated definition of the effort of analog multiplication, for instance, would be just as inappropriate on the part ofthe chip designer as determination of the weights by simulation, without allowing for the computing accuracy that can be achieved, on the part of the user.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 360 pp. Englisch.…