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Condizione: New. pp. 244.
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. Automatic Layout Modification | Including design reuse of the Alpha CPU in 0.13 micron SOI technology | Michael Reinhardt | Taschenbuch | xvi | Englisch | 2013 | Springer US | EAN 9781475775877 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
Lingua: Inglese
Editore: Springer US, Springer New York, 2013
ISBN 10: 1475775873 ISBN 13: 9781475775877
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - Design reuse techniques have become the subject of books, conferences, and podium discussions over the last few years. However, most discussions focus on higher-level abstraction like RTL descriptions, which can be synthesized. Design reuse is often seen as an add-on to normal design activity, or a special design task that is not an integrated part of the existing design flow. This may all be true for the ASIC world, but not for high-speed, high-performance microprocessors.In the field of high-speed microprocessors, design reuse is an integrated part of the design flow. The method of choice in this demanding field was, and is always, physical design reuse at the layout level. In the past, the practical implementations of this method were linear shrinks and the lambda approach. With the scaling of process technology down to 0.18 micron and below, this approach lost steam and became inefficient. The only viable solution is a method, which is now called Automatic Layout Modification (ALM). It combines compaction, mask manipulation, and correction with powerful capabilities.Automatic Layout Modification, Including design reuse of the Alpha CPU in 0.13 micron SOI technology is a welcome effort to improving some of the practices in chip design today.
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This volume is a welcome effort towards improving some of the practices in chip design today. The authors provide a comprehensive reference work on Automatic Layout Modification which will be valuable to VLSI courses at universities, and to CAD and circuit engineers and engineering managers. 244 pp. Englisch.
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Aggiungi al carrelloCondizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. This volume is a welcome effort towards improving some of the practices in chip design today. The authors provide a comprehensive reference work on Automatic Layout Modification which will be valuable to VLSI courses at universities, and to CAD and circu.
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Aggiungi al carrelloCondizione: New. Print on Demand pp. 244 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam.
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Aggiungi al carrelloCondizione: New. PRINT ON DEMAND pp. 244.
Lingua: Inglese
Editore: Springer US, Springer New York Mär 2013, 2013
ISBN 10: 1475775873 ISBN 13: 9781475775877
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
EUR 106,99
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Design reuse techniques have become the subject of books, conferences, and podium discussions over the last few years. However, most discussions focus on higher-level abstraction like RTL descriptions, which can be synthesized. Design reuse is often seen as an add-on to normal design activity, or a special design task that is not an integrated part of the existing design flow. This may all be true for the ASIC world, but not for high-speed, high-performance microprocessors.In the field of high-speed microprocessors, design reuse is an integrated part of the design flow. The method of choice in this demanding field was, and is always, physical design reuse at the layout level. In the past, the practical implementations of this method were linear shrinks and the lambda approach. With the scaling of process technology down to 0.18 micron and below, this approach lost steam and became inefficient. The only viable solution is a method, which is now called Automatic Layout Modification (ALM). It combines compaction, mask manipulation, and correction with powerful capabilities.Automatic Layout Modification, Including design reuse of the Alpha CPU in 0.13 micron SOI technology is a welcome effort to improving some of the practices in chip design today.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 244 pp. Englisch.