9783389028421 - an introduction to risc v. "reduced instruction set computer" processor di patel, arpita (5 risultati)
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Da: California Books, Miami, FL, U.S.A.California Books
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EUR 26,45
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Condizione: New.
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Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH
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EUR 18,95
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Taschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - Document from the year 2024 in the subject Computer Science, grade: A, , language: English, abstract: RISC-V, an open-source Instruction Set Architecture (ISA), has become a significant performer in the realm of computer architecture, challenging…traditional proprietary designs and opening the doors for innovation and customization. Initially in this work, RISC-V¿s historical evolution, its architecture, including its design concepts, instruction set, register file and implementations, were understood through a literature survey.A comprehensive literature survey is conducted on various variants of RISC-V family and their applications, which include lowering total costs, speeding up processor execution, consuming less power, and creating a more manageable and compact versions of the original architecture. The study includes a thorough analysis of several RISC-V variations. According to review of the literature, the 32-bit biRISC-V processor core is the newest member of the RISC-V family and using superscalar dual issue design to increase processor overall throughput.
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Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermaniaBuchWeltWeit Ludwig Meier e.K.
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Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware 36 pp. Englisch.
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Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germaniabuchversandmimpf2000
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EUR 60,00 spedizioneSpedito da Germania a U.S.A.Quantità: 1 disponibili
Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Document from the year 2024 in the subject Computer Science, grade: A, , language: English, abstract: RISC-V, an open-source Instruction Set Architecture (ISA), has become a significant performer in the realm of computer architecture,…challenging traditional proprietary designs and opening the doors for innovation and customization. Initially in this work, RISC-V¿s historical evolution, its architecture, including its design concepts, instruction set, register file and implementations, were understood through a literature survey.A comprehensive literature survey is conducted on various variants of RISC-V family and their applications, which include lowering total costs, speeding up processor execution, consuming less power, and creating a more manageable and compact versions of the original architecture. The study includes a thorough analysis of several RISC-V variations. According to review of the literature, the 32-bit biRISC-V processor core is the newest member of the RISC-V family and using superscalar dual issue design to increase processor overall throughput.Books on Demand GmbH, Überseering 33, 22297 Hamburg 36 pp. Englisch.
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Da: preigu, Osnabrück, Germaniapreigu
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EUR 18,95
EUR 70,00 spedizioneSpedito da Germania a U.S.A.Quantità: 5 disponibili
Taschenbuch. Condizione: Neu. An Introduction to RISC V. "Reduced Instruction Set Computer" Processor | Arpita Patel | Taschenbuch | Englisch | 2024 | GRIN Verlag | EAN 9783389028421 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu Print… on Demand.
