ISBN: 9783659158032 - design and analysis of clock subsystem elements: design and analysis of clock subsystem elements using different technique (2 risultati)

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  • Lingua: Inglese

    Editore: LAP LAMBERT Academic Publishing, 2012

    3659158038 / 9783659158032

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    Da: moluna, Greven, Germaniamoluna

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    Condizione: Nuovo

    EUR 49,26

    EUR 48,99 spedizione 
    Spedito da Germania a U.S.A.

    Quantità: Più di 20 disponibili

    Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Singh SanjayEr.Sanjay Singh has completed M.Tech degree in Electronics Design & Technology in 2012. He has published more then 25 papers in international journal/conferences. He is the member of editorial board in IJSTR and IJETAE. H.…

  • Lingua: Inglese

    Editore: LAP Lambert Academic Publishing, 2012

    3659158038 / 9783659158032

    • Brossura
    • Print on Demand

    Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH

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    Condizione: Nuovo

    EUR 66,55

    EUR 35,00 spedizione 
    Spedito da Germania a U.S.A.

    Quantità: 2 disponibili

    Taschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Flip-flop is an electronic circuit that stores a logical state of one or more data input signals in response to clock pulse. Flip-flop are often used in computational circuits to operate in selected sequences during recurring clock intervals to receive and maintain data for a limited time period sufficient for other circuits within a system to further process data. Flip-Flops are critical timing elements in digital circuits and have a large impact on circuit speed and power consumption. Consequently, extensive research has been performed to develop fast and low-power flip-flops. Recently, pulsed latch structures have emerged as the fastest known flip-flop structures. Flip-flops are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems. A new flip-flop design using a double-pulsed static latch is designed for 250-nanometer technology. This flip-flop consumes less power and fewer transistors in the clock generator as compared with the DPSCRFF (Double Pulsed Set Conditional Reset), which is one of the fastest known flip-flops in literature.…