9783843375993 - Motion Estimation Technique for H.264 Advanced Video Coder: Software modeling, hardware architecture design and FPGA implementation of motion estimation block for H... (6 risultati)

Taschenbuch. Condizione: Neu. Motion Estimation Technique for H.264 Advanced Video Coder | Software modeling, hardware architecture design and FPGA implementation of motion estimation block for H.264 AVC | Vikram Arkalgud Chandrasetty | Taschenbuch | 76 S. | Englisch | 2010 | LAP LAMBERT Academic Publishing | EAN 9783843375993 | Verantwortliche Person für die EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod[dot]de | Anbieter: preigu.

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Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Video compression is an active area for potential research. Due to the limitations in the available bandwidth and storage space for high quality multimedia content like - video broadcasting and DVD video data, video compression has become very much necessary to keep up the ever growing demand, yet maintaining the quality in decoded video. Motion Estimation technique in a video coder takes advantage of the temporal redundancy present in video data to achieve substantial compression. The block matching efficiency of the Motion Estimation algorithm, feasibility for hardware implementation and multiple frame storage delays are some of the key challenges faced in implementing a Motion Estimation block. In this work, a software model of Motion Estimation block for H.264 Advanced Video Coder is designed. One Step Search Motion Estimation algorithm is chosen for hardware modeling. The architecture of the model is designed to maximize the throughput of the system by using dual residual energy computation and comparison units for parallel processing of frame data. The hardware model is succesfully implemented and tested on Xilinx Virtex-4 FPGA. 76 pp. Englisch.

Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Arkalgud Chandrasetty VikramMr Vikram received B.E. in E&C from Bangalore University (India) and M.Sc[Engg] in VLSI System Design from Coventry University (UK). He is currently pursuing PhD in Computer Systems Engineering at Universi.

Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Video compression is an active area for potential research. Due to the limitations in the available bandwidth and storage space for high quality multimedia content like - video broadcasting and DVD video data, video compression has become very much necessary to keep up the ever growing demand, yet maintaining the quality in decoded video. Motion Estimation technique in a video coder takes advantage of the temporal redundancy present in video data to achieve substantial compression. The block matching efficiency of the Motion Estimation algorithm, feasibility for hardware implementation and multiple frame storage delays are some of the key challenges faced in implementing a Motion Estimation block. In this work, a software model of Motion Estimation block for H.264 Advanced Video Coder is designed. One Step Search Motion Estimation algorithm is chosen for hardware modeling. The architecture of the model is designed to maximize the throughput of the system by using dual residual energy computation and comparison units for parallel processing of frame data. The hardware model is succesfully implemented and tested on Xilinx Virtex-4 FPGA.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 76 pp. Englisch.

Taschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Video compression is an active area for potential research. Due to the limitations in the available bandwidth and storage space for high quality multimedia content like - video broadcasting and DVD video data, video compression has become very much necessary to keep up the ever growing demand, yet maintaining the quality in decoded video. Motion Estimation technique in a video coder takes advantage of the temporal redundancy present in video data to achieve substantial compression. The block matching efficiency of the Motion Estimation algorithm, feasibility for hardware implementation and multiple frame storage delays are some of the key challenges faced in implementing a Motion Estimation block. In this work, a software model of Motion Estimation block for H.264 Advanced Video Coder is designed. One Step Search Motion Estimation algorithm is chosen for hardware modeling. The architecture of the model is designed to maximize the throughput of the system by using dual residual energy computation and comparison units for parallel processing of frame data. The hardware model is succesfully implemented and tested on Xilinx Virtex-4 FPGA.