Editore: LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139587050 ISBN 13: 9786139587056
Lingua: Inglese
Da: Revaluation Books, Exeter, Regno Unito
EUR 60,69
Quantità: 1 disponibili
Aggiungi al carrelloPaperback. Condizione: Brand New. 52 pages. 8.66x5.91x0.12 inches. In Stock.
Editore: LAP LAMBERT Academic Publishing Apr 2018, 2018
ISBN 10: 6139587050 ISBN 13: 9786139587056
Lingua: Inglese
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
EUR 35,90
Quantità: 2 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. Neuware -This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work.Books on Demand GmbH, Überseering 33, 22297 Hamburg 52 pp. Englisch.
Editore: LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139587050 ISBN 13: 9786139587056
Lingua: Inglese
Da: preigu, Osnabrück, Germania
EUR 33,25
Quantità: 5 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. ASIC Implementation of Low Power FP-AU using Reversible Logic | Floating Point (FP)-Arithmetic Units (AU) | Vijeyakumar Krishnasamy Natarajan (u. a.) | Taschenbuch | 52 S. | Englisch | 2018 | LAP LAMBERT Academic Publishing | EAN 9786139587056 | Verantwortliche Person für die EU: BoD - Books on Demand, In de Tarpen 42, 22848 Norderstedt, info[at]bod[dot]de | Anbieter: preigu.
Editore: LAP LAMBERT Academic Publishing Apr 2018, 2018
ISBN 10: 6139587050 ISBN 13: 9786139587056
Lingua: Inglese
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
EUR 35,90
Quantità: 2 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work. 52 pp. Englisch.
Editore: LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139587050 ISBN 13: 9786139587056
Lingua: Inglese
Da: moluna, Greven, Germania
EUR 31,27
Quantità: Più di 20 disponibili
Aggiungi al carrelloCondizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Krishnasamy Natarajan VijeyakumarDr.K.N. Vijeyakumar is working as an Associate Professor in Dr.Mahalingam College of Engineering and Technology, Coimbatore, Tamilnadu. His area of interest include ASIC design, low power VLSI design.
Editore: LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139587050 ISBN 13: 9786139587056
Lingua: Inglese
Da: AHA-BUCH GmbH, Einbeck, Germania
EUR 37,20
Quantità: 1 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work.