Lingua: Inglese
Editore: LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139871794 ISBN 13: 9786139871797
Da: Revaluation Books, Exeter, Regno Unito
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Aggiungi al carrelloPaperback. Condizione: Brand New. 76 pages. 8.66x5.91x0.18 inches. In Stock.
Lingua: Inglese
Editore: LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139871794 ISBN 13: 9786139871797
Da: preigu, Osnabrück, Germania
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. Dynamically Reconfigurable Processor For Floating Point Arithmetic | Anbumani Selvamani | Taschenbuch | 76 S. | Englisch | 2018 | LAP LAMBERT Academic Publishing | EAN 9786139871797 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.
Lingua: Inglese
Editore: LAP LAMBERT Academic Publishing Jul 2018, 2018
ISBN 10: 6139871794 ISBN 13: 9786139871797
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
EUR 39,90
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Reconfigurable computing is a computer architecture combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like field-programmable gate arrays (FPGA). The principal difference when compared to using ordinary microprocessors is the ability to make substantial changes to the data path itself in addition to the control flow. On the other hand, the main difference from custom hardware, i.e. application-specific integrated circuits (ASIC) is the possibility to adapt the hardware during run time by 'loading' a new circuit on the reconfigurable fabric. 76 pp. Englisch.
Lingua: Inglese
Editore: LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139871794 ISBN 13: 9786139871797
Da: moluna, Greven, Germania
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Aggiungi al carrelloCondizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Selvamani AnbumaniS.Anbumani was born in the year of 1989, at Bhavani, She completed her B.E (BME) from Velalar College of Engineering & technology, in the year of 2010. She obtained her M.E (Applied Electronics) from SSM college of.
Lingua: Inglese
Editore: LAP LAMBERT Academic Publishing Jul 2018, 2018
ISBN 10: 6139871794 ISBN 13: 9786139871797
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
EUR 39,90
Quantità: 1 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Reconfigurable computing is a computer architecture combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like field-programmable gate arrays (FPGA). The principal difference when compared to using ordinary microprocessors is the ability to make substantial changes to the data path itself in addition to the control flow. On the other hand, the main difference from custom hardware, i.e. application-specific integrated circuits (ASIC) is the possibility to adapt the hardware during run time by 'loading' a new circuit on the reconfigurable fabric.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 76 pp. Englisch.
Lingua: Inglese
Editore: LAP LAMBERT Academic Publishing, 2018
ISBN 10: 6139871794 ISBN 13: 9786139871797
Da: AHA-BUCH GmbH, Einbeck, Germania
EUR 40,89
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Reconfigurable computing is a computer architecture combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like field-programmable gate arrays (FPGA). The principal difference when compared to using ordinary microprocessors is the ability to make substantial changes to the data path itself in addition to the control flow. On the other hand, the main difference from custom hardware, i.e. application-specific integrated circuits (ASIC) is the possibility to adapt the hardware during run time by 'loading' a new circuit on the reconfigurable fabric.