Cost-effective Methods for High-speed Nanometer CMOS VLSI Design: Interconnect and Circuits - Brossura
Sinossi
The semiconductor industry has been following Moore?s law over the past five decades due to the continuous CMOS process technology scaling. This scaling has led to reduced integrated circuit cost, higher integration density and better design performance. On the other hand, many new design challenges have been introduced due to scaling, and these chanllenges become more significant when migrating from one technology node to a newer one with smaller feature size. This book presents seven newly developped circuit and interconnect design methods for nanometer CMOS VLSI designs. The first four methods target issues in global on-chip signaling, on-chip busses, and clock signal distribution. Chapters six and seven of this book present circuit techniques for low-power high- speed digital circuits and high fan-in logic design. The last method presented in this book deals with the mode transition latency and energy overheads in the power-gated low-power designs.
Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.
L'autore
Charbel Akl received a M.S. in Computer Engineering from University of Balamand, Lebanon, in 2004, and a PhD in Computer Engineering from University of Louisiana at Lafayette in 2008. After graduation, he joined Intel Corporation where he is currently working on the design and implementation of low power microprocessors.
Le informazioni nella sezione "Su questo libro" possono far riferimento a edizioni diverse di questo titolo.
Altre edizioni note dello stesso titolo
Risultati della ricerca per Cost-effective Methods for High-speed Nanometer CMOS...
Immagini fornite dal venditore
Cost-effective Methods for High-speed Nanometer CMOS VLSI Design
Editore:
LAP LAMBERT Academic Publishing Mai 2010, 2010
ISBN 10: 3838307321
ISBN 13: 9783838307329
Nuovo
Taschenbuch
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
Valutazione del venditore 5 su 5 stelle
Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The semiconductor industry has been following Moore s law over the past five decades due to the continuous CMOS process technology scaling. This scaling has led to reduced integrated circuit cost, higher integration density and better design performance. On the other hand, many new design challenges have been introduced due to scaling, and these chanllenges become more significant when migrating from one technology node to a newer one with smaller feature size. This book presents seven newly developped circuit and interconnect design methods for nanometer CMOS VLSI designs. The first four methods target issues in global on-chip signaling, on-chip busses, and clock signal distribution. Chapters six and seven of this book present circuit techniques for low-power high- speed digital circuits and high fan-in logic design. The last method presented in this book deals with the mode transition latency and energy overheads in the power-gated low-power designs. 132 pp. Englisch. Codice articolo 9783838307329
Compra nuovo
EUR 59,00
Spedizione EUR 23,00
Spedito da Germania a U.S.A.
Spedito da Germania a U.S.A.
Quantità: 2 disponibili
Immagini fornite dal venditore
Cost-effective Methods for High-speed Nanometer CMOS VLSI Design
Editore:
LAP LAMBERT Academic Publishing, 2010
ISBN 10: 3838307321
ISBN 13: 9783838307329
Nuovo
Brossura
Da: moluna, Greven, Germania
Valutazione del venditore 5 su 5 stelle
Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Akl CharbelCharbel Akl received a M.S. in Computer Engineering from University of Balamand, Lebanon, in 2004, and a PhD in Computer Engineering from University of Louisiana at Lafayette in 2008. After graduation, he joined Intel . Codice articolo 5411448
Compra nuovo
EUR 48,50
Spedizione EUR 48,99
Spedito da Germania a U.S.A.
Spedito da Germania a U.S.A.
Quantità: Più di 20 disponibili
Immagini fornite dal venditore
Cost-effective Methods for High-speed Nanometer CMOS VLSI Design
Editore:
LAP LAMBERT Academic Publishing Mai 2010, 2010
ISBN 10: 3838307321
ISBN 13: 9783838307329
Nuovo
Taschenbuch
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
Valutazione del venditore 5 su 5 stelle
Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The semiconductor industry has been following Moore's law over the past five decades due to the continuous CMOS process technology scaling. This scaling has led to reduced integrated circuit cost, higher integration density and better design performance. On the other hand, many new design challenges have been introduced due to scaling, and these chanllenges become more significant when migrating from one technology node to a newer one with smaller feature size. This book presents seven newly developped circuit and interconnect design methods for nanometer CMOS VLSI designs. The first four methods target issues in global on-chip signaling, on-chip busses, and clock signal distribution. Chapters six and seven of this book present circuit techniques for low-power high- speed digital circuits and high fan-in logic design. The last method presented in this book deals with the mode transition latency and energy overheads in the power-gated low-power designs.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 132 pp. Englisch. Codice articolo 9783838307329
Compra nuovo
EUR 59,00
Spedizione EUR 60,00
Spedito da Germania a U.S.A.
Spedito da Germania a U.S.A.
Quantità: 1 disponibili
Immagini fornite dal venditore
Cost-effective Methods for High-speed Nanometer CMOS VLSI Design : Interconnect and Circuits
Editore:
LAP LAMBERT Academic Publishing, 2009
ISBN 10: 3838307321
ISBN 13: 9783838307329
Nuovo
Taschenbuch
Da: AHA-BUCH GmbH, Einbeck, Germania
Valutazione del venditore 5 su 5 stelle
Taschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - The semiconductor industry has been following Moore s law over the past five decades due to the continuous CMOS process technology scaling. This scaling has led to reduced integrated circuit cost, higher integration density and better design performance. On the other hand, many new design challenges have been introduced due to scaling, and these chanllenges become more significant when migrating from one technology node to a newer one with smaller feature size. This book presents seven newly developped circuit and interconnect design methods for nanometer CMOS VLSI designs. The first four methods target issues in global on-chip signaling, on-chip busses, and clock signal distribution. Chapters six and seven of this book present circuit techniques for low-power high- speed digital circuits and high fan-in logic design. The last method presented in this book deals with the mode transition latency and energy overheads in the power-gated low-power designs. Codice articolo 9783838307329
Compra nuovo
EUR 59,71
Spedizione EUR 61,08
Spedito da Germania a U.S.A.
Spedito da Germania a U.S.A.
Quantità: 1 disponibili
Immagini fornite dal venditore
Cost-effective Methods for High-speed Nanometer CMOS VLSI Design | Interconnect and Circuits
Editore:
LAP LAMBERT Academic Publishing, 2010
ISBN 10: 3838307321
ISBN 13: 9783838307329
Nuovo
Taschenbuch
Da: preigu, Osnabrück, Germania
Valutazione del venditore 5 su 5 stelle
Taschenbuch. Condizione: Neu. Cost-effective Methods for High-speed Nanometer CMOS VLSI Design | Interconnect and Circuits | Charbel Akl | Taschenbuch | 132 S. | Englisch | 2010 | LAP LAMBERT Academic Publishing | EAN 9783838307329 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu Print on Demand. Codice articolo 101507859
Compra nuovo
EUR 51,10
Spedizione EUR 70,00
Spedito da Germania a U.S.A.
Spedito da Germania a U.S.A.
Quantità: 5 disponibili
Foto dell'editore
Cost-effective Methods for High-speed Nanometer CMOS VLSI Design: Interconnect and Circuits
Editore:
LAP Lambert Academic Publishing, 2009
ISBN 10: 3838307321
ISBN 13: 9783838307329
Antico o usato
Paperback
Da: Mispah books, Redhill, SURRE, Regno Unito
Valutazione del venditore 4 su 5 stelle
Paperback. Condizione: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book. Codice articolo ERICA79038383073216
Compra usato
EUR 140,23
Spedizione EUR 29,34
Spedito da Regno Unito a U.S.A.
Spedito da Regno Unito a U.S.A.
Quantità: 1 disponibili