Articoli correlati a Low Power Digital Design using Asynchronous Logic:...

Low Power Digital Design using Asynchronous Logic: Moving towards clock-less design - Brossura

Antony Jayasekar, Sathish Vimalraj

 
9783846518441: Low Power Digital Design using Asynchronous Logic: Moving towards clock-less design
Brossura
ISBN 10: 3846518441 ISBN 13: 9783846518441
Casa editrice: LAP LAMBERT Academic Publishing, 2011

Sinossi

The need for low power design is motivated by several factors, such as the emergence of portable systems, thermal considerations, reliability issues, and, most importantly, environmental concerns. Lots of power is wasted in an electronic device when the system is idle. This book introduces a new method of achieving low power by reducing the dependency of the clock signal in the design. It mainly focuses on obtaining low power by implementing asynchronous logic.

Le informazioni nella sezione "Riassunto" possono far riferimento a edizioni diverse di questo titolo.

L'autore

This work on Low power digital design using asynchronous logic is my first publication. I did this work as a thesis during my Masters in Electrical Engineering in SJSU. The main reason I was interested in this topic had an environmental concern and that was the amount of power that could be saved by going in for asynchronous design.

Le informazioni nella sezione "Su questo libro" possono far riferimento a edizioni diverse di questo titolo.

Editore
LAP LAMBERT Academic Publishing
Data di pubblicazione
2011
Lingua
Inglese
ISBN 10 
3846518441
ISBN 13 
9783846518441
Rilegatura
Copertina flessibile
Numero di pagine
92
Contatto del produttore
non disponibile
Persona responsabile
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