Compact Transistor Modelling for Circuit Design (Computational Microelectronics)

Henk C. de Graaff

ISBN 10: 3709190452 / ISBN 13: 9783709190456

Editore: Springer 2013-10-04, 2013

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Codice articolo 6666-IUK-9783709190456

Dati bibliografici

• Titolo: Compact Transistor Modelling for Circuit Design (Computational Microelectronics)
• Editore: Springer 2013-10-04
• Data di pubblicazione: 2013
• Lingua: Inglese
• ISBN 10: 3709190452
• ISBN 13: 9783709190456
• Rilegatura: Paperback
• Condizione: New

Descrizione articolo

Riassunto

During the first decade following the invention of the transistor, progress in semiconductor device technology advanced rapidly due to an effective synergy of technological discoveries and physical understanding. Through physical reasoning, a feeling for the right assumption and the correct interpretation of experimental findings, a small group of pioneers conceived the major analytic design equations, which are currently to be found in numerous textbooks. Naturally with the growth of specific applications, the description of some characteristic properties became more complicated. For instance, in inte­ grated circuits this was due in part to the use of a wider bias range, the addition of inherent parasitic elements and the occurrence of multi­ dimensional effects in smaller devices. Since powerful computing aids became available at the same time, complicated situations in complex configurations could be analyzed by useful numerical techniques. Despite the resulting progress in device optimization, the above approach fails to provide a required compact set of device design and process control rules and a compact circuit model for the analysis of large-scale electronic designs. This book therefore takes up the original thread to some extent. Taking into account new physical effects and introducing useful but correct simplifying assumptions, the previous concepts of analytic device models have been extended to describe the characteristics of modern integrated circuit devices. This has been made possible by making extensive use of exact numerical results to gain insight into complicated situations of transistor operation.

Contenuti

1 Introduction.- 1.1 Compact Models.- 1.1.1 Models Based on Device Physics.- 1.1.2 Numerical Table Models.- 1.1.3 Empirical Models.- 1.2 Compact Models and Simulation Programs.- 1.3 Subjects Treated in This Book.- References.- 2 Some Basic Semiconductor Physics.- 2.1 Quantum-Mechanical Concepts.- 2.2 Distribution Function and Carrier Concentration.- 2.3 The Boltzmann Transport Equation.- 2.4 Bandgap Narrowing.- 2.5 Mobility and Resistivity in Silicon.- 2.6 Recombination.- 2.7 Avalanche Multplication.- 2.8 Noise Sources.- 2.8.1 Shot Noise.- 2.8.2 Diffusion Noise and Thermal Noise.- 2.8.3 Flicker Noise.- References.- 3 Modelling of Bipolar Device Phenomena.- 3.1 Injection and Transport Models.- 3.1.1 Solution of the Continuity Equations.- 3.1.2 Injection Model.- 3.1.3 Transport Model.- 3.2 The Quasi-Static Approximation and the Charge Control Principle.- 3.3 Collector Currents and Stored Charges.- 3.3.1 General Relation Between Collector Current and Charges.- 3.3.2 The Integral Charge Control Relation.- 3.3.3 Current, Charges and Minority Carrier Concentrations.- 3.3.3.1 The Low-Injection Case: n(x) « Na(x).- 3.3.3.2 The High-Injection Case: n(x) » Na(x).- 3.3.3.3 The General Case.- 3.4 Base Currents.- 3.5 Depletion Charges and Capacitances.- 3.5.1 Influence of Current on QTc.- 3.6 Early Effect.- 3.7 Quasi-Saturation, Base Widening and Kirk Effect.- 3.7.1 The Charge Storage in the Epilayer.- 3.7.2 Influence of Ic: Ohmic and Hot Carrier Behaviour (Kirk Effect).- 3.7.3 Inverse Mode of Operation.- 3.8 Avalanche Multiplication.- 3.9 Series Resistances.- 3.9.1 Emitter Series Resistance.- 3.9.2 Base Resistance.- 3.9.3 Collector Series Resistance.- 3.10 Time- and Frequency-Dependent Behaviour.- 3.10.1 Charge Control and Quasi-Static Approach.- 3.10.2 Exact One-Dimensional Solution.- 3.10.3 Time Delays.- 3.10.4 Base Charge Partitioning.- 3.10.5 Second-Order Differential Operators.- 3.11 Transit Time and Cut-Off Frequency fT.- 3.12 Noise Behaviour.- 3.13 Temperature Dependences.- References.- 4 Compact Models for Vertical Bipolar Transistors.- 4.1 Ebers-Moll-Type Models.- 4.1.1 Basic Ebers-Moll Model.- 4.1.2 Extensions of the Basic Ebers-Moll Model.- 4.1.3 Temperature Dependence of the Parameters.- 4.1.4 Typical Results.- 4.2 Gummel-Poon-Type Models.- 4.2.1 Basic Gummel-Poon Model.- 4.2.2 Extensions.- 4.2.3 Full Quasi-Saturation Model.- 4.2.4 Typical Results.- 4.3 The MEXTRAM Model.- 4.3.1 Main Currents and Stored Charges.- 4.3.2 Quasi-Saturation and Hot-Carrier Effect in the Epilayer.- 4.3.3 Depletion Charges.- 4.3.4 Base Currents.- 4.3.5 Series Resistances.- 4.3.6 Modelling the Inactive Part and Substrate.- 4.3.7 Typical Results.- 4.4 Short Review.- 4.4.1 Basic Ebers-Moll Model.- 4.4.2 Extensions to the Ebers-Moll Model.- 4.4.3 Basic Gummel-Poon Model.- 4.4.4 Extensions to the Gummel-Poon Model.- 4.4.5 Mextram Models.- References.- 5 Lateral pnp Transistor Models.- 5.1 Model Definitions.- 5.1.1 Lateral pnp Models of the Ebers-Moll Type.- 5.1.2 Lateral pnp Models of the Gummel-Poon Type.- 5.2 Results.- 5.3 Shortcomings of Existing Models.- References.- 6 MOSFET Physics Relevant to Device Modelling.- 6.1 Formation of the Inversion Layer.- 6.1.1 Qualitative Discussion.- 6.1.2 Quantitative Analysis.- 6.2 The Ideal MOS Transistor Current.- 6.3 The Threshold Voltage.- 6.3.1 The Body Effect.- 6.3.2 Effect of Implants Additional to the Substrate Doping.- 6.3.3 Effect of Implants of Opposite Type to the Substrate Doping.- 6.3.4 Temperature Dependence.- 6.3.5 Short-Channel Effect.- 6.3.6 Narrow-Width Effect.- 6.4 Carrier Mobility in Inversion Layers.- 6.4.1 Bias Dependence of the Carrier Mobility.- 6.4.2 Temperature Dependence.- 6.4.3 Modelling of Effects Other than Mobility Via the ?-Parameters.- 6.5 Saturation Mode.- 6.5.1 Static Feedback.- 6.5.2 Channel-Length Modulation.- 6.6 Dynamic Operation.- 6.6.1 Quasi-Static Operation.- 6.6.2 Charges, Charge Distribution and Capacitances in the Active Region.- 6.6.3 Charges in the Off-State Region.- 6.6.4 Parasitic Contributions.- 6.7 Intrinsic Parasitics.- 6.7.1 Series Resistance.- 6.7.2 Gate-Junction Capacitance.- References.- 7 Models for the Enhancement-Type MOSFET.- 7.1 Long-Channel Models.- 7.1.1 The Drain Current of Transistors in Uniformly Doped Substrates.- 7.1.2 The Drain Current of Transistors with Threshold Adjustment Implant.- 7.1.3 Charges and Capacitances.- 7.1.4 Effect of Velocity Saturation on the Drain Current.- 7.2 Small Transistor Models.- 7.2.1 The Drain Current in Small MOSFETS.- 7.2.1.1 The Threshold Voltage.- 7.2.1.2 The Substrate Effect.- 7.2.1.3 The Drain Saturation Voltage.- 7.2.1.4 Static Feedback and Channel Length Modulation.- 7.2.1.5 The Subthreshold Mode.- 7.2.2 Charges.- 7.2.2.1 Strong-Inversion Region.- 7.2.2.2 Capacitances.- 7.2.2.3 Charge in the Subthreshold Region.- 7.2.3 Effect of Series Resistance on the Drain Current.- 7.2.4 The Substrate Current.- 7.3 Models for Analog Applications.- 7.3.1 Review of Existing Models.- 7.3.2 Improved Description of the Drain Current.- 7.3.3 Capacitances.- 7.3.4 Noise.- 7.3.4.1 Thermal Noise.- 7.3.4.2 Flicker Noise.- References.- 8 Models for the Depletion-Type MOSFET.- 8.1 Long-Channel Model.- 8.1.1 Mobile Charge Density.- 8.1.2 Threshold and Saturation Voltages.- 8.1.3 Channel Current.- 8.2 Short-Channel Model.- 8.2.1 Specific Problems.- 8.2.2 Depletion-Mode Channel Conductance for a Linear Doping Profile.- 8.2.3 The Drain Current of a Short-Channel Depletion MOSFET.- 8.3 Charges and Charge Distribution.- References.- 9 Models for the JFET and the MESFET.- 9.1 The Drain Current of the Junction-Gate FET.- 9.1.1 The Classical Description.- 9.1.2 A Model for Short-Channel Transistors.- 9.2 The Drain Current of the MESFET.- 9.2.1 Review of Empirical Models.- 9.2.2 An Improved Model.- 9.3 Charges and Capacitances.- References.- 10 Parameter Determination.- 10.1 General Optimization Method.- 10.1.1 The Linear Case.- 10.2 Specific Bipolar Measurements.- 10.2.1 Measurements of Series Resistances.- 10.2.2 Measuring the Cut-Off Frequency fT.- 10.3 Example of Parameter Extraction for a Bipolar Transistor Model.- 10.3.1 The Depletion Capacitances.- 10.3.2 Early Effects.- 10.3.3 The Gummel Plots.- 10.3.4 The Quasi-Saturation.- 10.3.5 The Cut-Off Frequency fT.- 10.3.6 Concluding Remarks.- 10.4 Parameter Determination for MOSFETs.- 10.4.1 Enhancement Devices.- 10.4.2 Depletion Devices.- 10.5 Specific MOSFET Measurements.- References.- 11 Process and Geometry Dependence, Optimization and Statistics of Parameters.- 11.1 Unity Parameters and Geometrical Scaling in Bipolar Modelling.- 11.1.1 Geometry Dependence.- 11.1.2 Process Dependence of Unity Parameters.- 11.2 Bipolar Process Blocks and Circuit Optimization.- 11.3 Geometry- and Process Dependence of MOSFET Parameters.- 11.3.1 Geometry Dependence.- 11.3.2 Process Dependence.- 11.4 Statistics: Definitions and Formulas.- 11.5 Bipolar Statistical Modelling.- 11.5.1 Process Blocks and Statistical Models.- 11.5.2 Correlation Between Compact Model Parameters.- 11.5.3 Correlation at the Process Level.- 11.6 MOS Statistical Modelling.- 11.6.1 Mismatch in MOSFETs.- 11.6.2 Parametric Yield Estimation in MOS VLSI.- References.