Low Power Flash ADC

Murra Subba Reddy

ISBN 10: 3845440848 / ISBN 13: 9783845440842

Editore: LAP LAMBERT Academic Publishing Aug 2011, 2011

Riguardo questo articolo

Neuware -In this project, a new design for a low power CMOS flash Analog-to-Digital Converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1 GHz, is implemented in a 1.2 V analog supply voltage. Microwind simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes about 72 mW in a commercial 90 nm CMOS process. The new design offers lower number of comparators and lower power consumption compared with the traditional flash ADC.Books on Demand GmbH, Überseering 33, 22297 Hamburg 80 pp. Englisch.

Codice articolo 9783845440842

Dati bibliografici

• Titolo: Low Power Flash ADC
• Editore: LAP LAMBERT Academic Publishing Aug 2011
• Data di pubblicazione: 2011
• Lingua: Inglese
• ISBN 10: 3845440848
• ISBN 13: 9783845440842
• Rilegatura: Taschenbuch
• Condizione: Neu

Descrizione articolo

Riassunto

In this project, a new design for a low power CMOS flash Analog-to-Digital Converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1 GHz, is implemented in a 1.2 V analog supply voltage. Microwind simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes about 72 mW in a commercial 90 nm CMOS process. The new design offers lower number of comparators and lower power consumption compared with the traditional flash ADC.

L'autore

It describes how to design a low power flash ADC which gives high speed,low cost&less complexity rather than conventional flash ADC.