Principles of Verifiable RTL Design : A functional coding style supporting verification processes in Verilog

Lingua: inglese

Editore: Humana, 2013

1475773137 / 9781475773132

Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH

Venditore con 5 stelle

Venditore AbeBooks dal 14 agosto 2006

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Descrizione dell’articolo da parte del venditore

nach der Bestellung gedruckt Neuware - Printed after ordering - Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog explains how you can write Verilog to describe chip designs at the RT-level in a manner that cooperates with verification processes. This cooperation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labor costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer. It also orients the RTL style to provide more useful results from the overall verification process. The intended audience for Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog is engineers and students who need an introduction to various design verification processes and a supporting functional Verilog RTL coding style. A second intended audience is engineers who have been through introductory training in Verilog and now want to develop good RTL writing practices for verification. A third audience is Verilog language instructors who are using a general text on Verilog as the course textbook but want to enrich their lectures with an emphasis on verification. A fourth audience is engineers with substantial Verilog experience who want to improve their Verilog practice to work better with RTL Verilog verification tools. A fifth audience is design consultants searching for proven verification-centric methodologies. A sixth audience is EDA verification tool implementers who want some suggestions about a minimal Verilog verification subset. Principles of Verifiable RTL Design: A Functional Coding Style Supporting Verification Processes in Verilog is based on the reality that comes from actual large-scale product design process and tool experience.…

Codice articolo 9781475773132

Titolo
Principles of Verifiable RTL Design : A functional coding style supporting verification processes in Verilog
Autore
Lionel Bening
Editore
Humana
Anno di pubblicazione
2013
Condizione
Neu
Rilegatura
Taschenbuch
Lingua
inglese
ISBN 10
1475773137
ISBN 13
9781475773132
Peso dell'articolo
417 grammi
Dimensioni
235x155x15 mm

AHA-BUCH GmbH

Einbeck, Germania

Venditore con 5 stelle

Venditore AbeBooks dal 14 agosto 2006

Tariffe di spedizione da Germania a U.S.A.

ArticoloDa 7 a 10 giorni lavorativiDa 5 a 7 giorni lavorativi
Primo articoloEUR 35,00EUR 45,00
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