Semiconductor Process Reliability in Practice (Hardcover)
Zhenghao Gan
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Venditore AbeBooks dal 29 giugno 2022
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Aggiungere al carrelloVenduto da CitiRetail, Stevenage, Regno Unito
Venditore AbeBooks dal 29 giugno 2022
Condizione: Nuovo
Quantità: 1 disponibili
Aggiungere al carrelloHardcover. Publisher's Note: Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product.Proven processes for ensuring semiconductor device reliabilityCo-written by experts in the field, Semiconductor Process Reliability in Practice contains detailed descriptions and analyses of reliability and qualification for semiconductor device manufacturing and discusses the underlying physics and theory. The book covers initial specification definition, test structure design, analysis of test structure data, and final qualification of the process. Real-world examples of test structure designs to qualify front-end-of-line devices and back-end-of-line interconnects are provided in this practical, comprehensive guide.Coverage includes:Basic device physicsProcess flow for MOS manufacturingMeasurements useful for device reliability characterizationHot carrier injectionGate-oxide integrity (GOI) and time-dependentdielectric breakdown (TDDB)Negative bias temperature instabilityPlasma-induced damageElectrostatic discharge protection of integrated circuitsElectromigrationStress migrationIntermetal dielectric breakdown Filled with practical examples, this is a comprehensive reference on process reliability for semiconductor process and design engineers. Shipping may be from our UK warehouse or from our Australian or US warehouses, depending on stock availability.
Codice articolo 9780071754279
Co-written by experts in the field, Semiconductor Process Reliability in Practice contains detailed descriptions and analyses of reliability and qualification for semiconductor device manufacturing and discusses the underlying physics and theory. The book covers initial specification definition, test structure design, analysis of test structure data, and final qualification of the process. Real-world examples of test structure designs to qualify front-end-of-line devices and back-end-of-line interconnects are provided in this practical, comprehensive guide.
Coverage includes:
Zhenghao Gan is a reliability technical manager at the Semiconductor Manufacturing International Corporation (SMIC), Shanghai, China. He has extensive technical and management experience in research and development of semiconductor reliability improvement, testing/characterization, problem solving, project management, modeling, and analysis.
Waisum Wong, Ph.D., is in charge of process reliability at the Semiconductor Manufacturing International Corporation (SMIC), Shanghai, China. He has extensive experience in power device development and modeling.
Juin J. Liou, Ph.D., is the Pegasus Distinguished Professor and UCF-Analog Devices Fellow in the Department of Electrical and Computer Engineering at the University of Central Florida. He has published eight books and has been awarded more than $9 million in research contracts and grants from federal agencies, state governments, and industry leaders.
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