Simulation Methodology to Compare Alternatives to Silicon Device : Ultra-thin body single-gate/double-gate,FinFET,tri- gate FDSOI MOSFET,Indium Antimonide MOSFET,Gallium Nitride MOSFET,which is future logic device?

Yawei Jin

ISBN 10: 3639105605 / ISBN 13: 9783639105605

Editore: VDM Verlag Dr. Müller, 2009

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nach der Bestellung gedruckt Neuware - Printed after ordering - Practical realization of low-power, high-speed transistor technologies for future generation nano-electronics can be achieved with novel structures, such as FinFET, tri-gate or with the integration of exotic channel materials,such as Gallium Nitride(GaN), into Fully-Depleted SOI(FDSOI) transistor architectures.Novel Structures are the most promising candidates for logic devices with sub-20nm gate length. They can increase gate control and suppress short channel effects. To compare the feasibility of these different structures and to project the device performance, technology CAD (TCAD) simulation is a reasonable method.The III-V semiconductors, such as Gallium Nitride (GaN), have high maximum electron drift velocities and ballistic mean free paths, which would enable high-speed transistor operation at very low voltages with gate lengths below 10nm. Since it s impracticalfor experiments currently, TCAD simulation can be used to project performance goals for aggressively scaled devices.This research focus on the methodology to compare different technologies for alternativeto Silicon based traditional logic device using TCAD simulations.

Codice articolo 9783639105605

Dati bibliografici

• Titolo: Simulation Methodology to Compare Alternatives to Silicon Device : Ultra-thin body single-gate/double-gate,FinFET,tri- gate FDSOI MOSFET,Indium Antimonide MOSFET,Gallium Nitride MOSFET,which is future logic device?
• Editore: VDM Verlag Dr. Müller
• Data di pubblicazione: 2009
• Lingua: Inglese
• ISBN 10: 3639105605
• ISBN 13: 9783639105605
• Rilegatura: Taschenbuch
• Condizione: Neu
• Dimensioni: 220 L x 176 A x 33 P (millimetri) 220 millimetri di larghezza per 176 millimetri di altezza per 33 millimetri di profondità
• Peso: 296 grammi

Descrizione articolo

Riassunto

Practical realization of low-power, high-speed transistor technologies for future generation nano- electronics can be achieved with novel structures, such as FinFET, tri-gate or with the integration of exotic channel materials,such as Gallium Nitride (GaN), into Fully-Depleted SOI(FDSOI) transistor architectures. Novel Structures are the most promising candidates for logic devices with sub-20nm gate length. They can increase gate control and suppress short channel effects. To compare the feasibility of these different structures and to project the device performance, technology CAD (TCAD) simulation is a reasonable method. The III-V semiconductors, such as Gallium Nitride (GaN), have high maximum electron drift velocities and ballistic mean free paths, which would enable high-speed transistor operation at very low voltages with gate lengths below 10nm. Since it¿s impractical for experiments currently, TCAD simulation can be used to project performance goals for aggressively scaled devices. This research focus on the methodology to compare different technologies for alternative to Silicon based traditional logic device using TCAD simulations.

L'autore

Yawei Jin was born in 1979.He got his PhD from North Carolina State University in 2006.His work focuses on simulation and modeling of nano-scale logic devices including novel structure and III-nitride based devices for alternative to tranditional MOSFET.He also worked as intern in Micro&Nano Structure Technology Lab at GE Research in 2005.