VLSI Planarization: Methods, Models, Implementation
Feinberg, V.Z., Levin, A.G., Rabinovich, E.B.
ISBN 10: 9401064210 ISBN 13: 9789401064217
Editore: Springer, 2012
Nuovi
Brossura
Da
Kennys Bookstore, Olney, MD, U.S.A.
Valutazione del venditore 5 su 5 stelle
Venditore AbeBooks dal 9 ottobre 2009
Questo articolo specifico non è più disponibile.
Riguardo questo articolo
Descrizione:
2012. Paperback. . . . . . Books ship from the US and Ireland. Codice articolo V9789401064217
Riassunto:
At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it.
Recensione:
`Altogether, the book is very well written and a good piece of work. All the notions are clearly defined and the proofs are presented in detail. Many pictures illustrate the subjects discussed and help to make things clear and understandable.'
Mathematical Reviews, 98m
Le informazioni nella sezione "Su questo libro" possono far riferimento a edizioni diverse di questo titolo.
Dati bibliografici
Titolo: VLSI Planarization: Methods, Models, ...
Casa editrice: Springer
Data di pubblicazione: 2012
Legatura: Brossura
Condizione: New
I migliori risultati di ricerca su AbeBooks
Immagini fornite dal venditore
VLSI Planarization
Editore:
Springer Netherlands Okt 2012, 2012
ISBN 10: 9401064210
ISBN 13: 9789401064217
Nuovo
Taschenbuch
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
Valutazione del venditore 5 su 5 stelle
Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it. 196 pp. Englisch. Codice articolo 9789401064217
Quantità: 2 disponibili
Immagini fornite dal venditore
VLSI Planarization
Print on DemandDa: moluna, Greven, Germania
Valutazione del venditore 4 su 5 stelle
Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. At the beginning we would like to introduce a refinement. The term VLSI planarization means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum to. Codice articolo 5833046
Quantità: Più di 20 disponibili
Foto dell'editore
VLSI Planarization: Methods, Models, Implementation (Mathematics and Its Applications)
Da: Lucky's Textbooks, Dallas, TX, U.S.A.
Valutazione del venditore 5 su 5 stelle
Condizione: New. Codice articolo ABLIING23Apr0412070056216
Quantità: Più di 20 disponibili
Foto dell'editore
VLSI Planarization (Paperback)
Da: Grand Eagle Retail, Bensenville, IL, U.S.A.
Valutazione del venditore 5 su 5 stelle
Paperback. Condizione: new. Paperback. At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. Codice articolo 9789401064217
Quantità: 1 disponibili
Immagini fornite dal venditore
VLSI Planarization
Editore:
Springer Netherlands, Springer Netherlands Okt 2012, 2012
ISBN 10: 9401064210
ISBN 13: 9789401064217
Nuovo
Taschenbuch
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
Valutazione del venditore 5 su 5 stelle
Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 196 pp. Englisch. Codice articolo 9789401064217
Quantità: 1 disponibili
Immagini fornite dal venditore
VLSI Planarization : Methods, Models, Implementation
Da: AHA-BUCH GmbH, Einbeck, Germania
Valutazione del venditore 5 su 5 stelle
Taschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - At the beginning we would like to introduce a refinement. The term 'VLSI planarization' means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to computer aided design the placement and routing problems are solved successively. The topological approach, in contrast, allows one to solve both problems at the same time. This is achieved by constructing a planar embedding of a circuit and obtaining the proper VLSI layout on the basis of it. Codice articolo 9789401064217
Quantità: 1 disponibili
Foto dell'editore
VLSI Planarization: Methods, Models, Implementation (Mathematics and Its Applications)
Da: Ria Christie Collections, Uxbridge, Regno Unito
Valutazione del venditore 5 su 5 stelle
Condizione: New. In. Codice articolo ria9789401064217_new
Quantità: Più di 20 disponibili
Foto dell'editore
VLSI Planarization: Methods, Models, Implementation (Mathematics and Its Applications)
Da: California Books, Miami, FL, U.S.A.
Valutazione del venditore 5 su 5 stelle
Condizione: New. Codice articolo I-9789401064217
Quantità: Più di 20 disponibili
Foto dell'editore
VLSI Planarization
Da: Books Puddle, New York, NY, U.S.A.
Valutazione del venditore 4 su 5 stelle
Condizione: New. pp. 196. Codice articolo 26126840904
Quantità: 4 disponibili
Foto dell'editore
VLSI Planarization
Print on DemandDa: Majestic Books, Hounslow, Regno Unito
Valutazione del venditore 5 su 5 stelle
Condizione: New. Print on Demand pp. 196 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam. Codice articolo 133746583
Quantità: 4 disponibili