VLSI Test Principles and Architectures: Design for Testability (Morgan Kaufmann Series in Systems on Silicon (Hardcover))

Wang, Laung-Terng; Wu, Cheng-Wen; Wen, Xiaoqing

ISBN 10: 0123705975 / ISBN 13: 9780123705976

Editore: Morgan Kaufmann, 2006

Riguardo questo articolo

In shrink wrap. Looks like an interesting title! Codice articolo Q-0123705975

Dati bibliografici

Titolo: VLSI Test Principles and Architectures: ...

Casa editrice: Morgan Kaufmann

Data di pubblicazione: 2006

Legatura: hardcover

Condizione: New

Descrizione articolo

Riassunto:

This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.

· Most up-to-date coverage of design for testability.
· Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books.
· Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.
· Lecture slides and exercise solutions for all chapters are now available.
· Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website.

Informazioni sugli autori:

Laung-Terng Wang, Ph.D., is founder, chairman, and chief executive officer of SynTest Technologies, CA. He received his EE Ph.D. degree from Stanford University. A Fellow of the IEEE, he holds 18 U.S. Patents and 12 European Patents, and has co-authored/co-edited two internationally used DFT textbooks- VLSI Test Principles and Architectures (2006) and System-on-Chip Test Architectures (2007).

Kwang-Ting (Tim) Cheng, Ph.D., is a Professor and Chair of the Electrical and Computer Engineering Department at the University of California, Berkeley. A Fellow of the IEEE, he has published over 300 technical papers, co-authored three books, and holds 11 U.S. Patents.