Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 115,52
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Aggiungi al carrelloCondizione: New. In.
Condizione: New.
Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 127,72
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Aggiungi al carrelloCondizione: New. In.
Lingua: Inglese
Editore: Springer International Publishing AG, CH, 2017
ISBN 10: 3319604015 ISBN 13: 9783319604015
Da: Rarewaves.com USA, London, LONDO, Regno Unito
EUR 143,02
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Aggiungi al carrelloHardback. Condizione: New. 1st ed. 2018.
Da: Revaluation Books, Exeter, Regno Unito
EUR 152,21
Quantità: 2 disponibili
Aggiungi al carrelloHardcover. Condizione: Brand New. 146 pages. 9.25x6.25x0.50 inches. In Stock.
Lingua: Inglese
Editore: Springer International Publishing, 2017
ISBN 10: 3319604015 ISBN 13: 9783319604015
Da: AHA-BUCH GmbH, Einbeck, Germania
EUR 106,99
Quantità: 1 disponibili
Aggiungi al carrelloBuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.
Condizione: New. pp. 146.
EUR 104,15
Quantità: 5 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip | Pascal Meinerzhagen (u. a.) | Taschenbuch | ix | Englisch | 2018 | Springer | EAN 9783319868554 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
Lingua: Inglese
Editore: Springer International Publishing, Springer International Publishing, 2018
ISBN 10: 3319868551 ISBN 13: 9783319868554
Da: AHA-BUCH GmbH, Einbeck, Germania
EUR 117,69
Quantità: 1 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.
Da: Revaluation Books, Exeter, Regno Unito
EUR 163,72
Quantità: 2 disponibili
Aggiungi al carrelloPaperback. Condizione: Brand New. reprint edition. 146 pages. 9.25x6.10x0.36 inches. In Stock.
Lingua: Inglese
Editore: Springer International Publishing AG, CH, 2017
ISBN 10: 3319604015 ISBN 13: 9783319604015
Da: Rarewaves.com UK, London, Regno Unito
EUR 135,41
Quantità: Più di 20 disponibili
Aggiungi al carrelloHardback. Condizione: New. 1st ed. 2018.
Da: Brook Bookstore On Demand, Napoli, NA, Italia
EUR 86,24
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Aggiungi al carrelloCondizione: new. Questo è un articolo print on demand.
Da: Brook Bookstore On Demand, Napoli, NA, Italia
EUR 94,25
Quantità: Più di 20 disponibili
Aggiungi al carrelloCondizione: new. Questo è un articolo print on demand.
Lingua: Inglese
Editore: Springer International Publishing Jul 2017, 2017
ISBN 10: 3319604015 ISBN 13: 9783319604015
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
EUR 106,99
Quantità: 2 disponibili
Aggiungi al carrelloBuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy. 156 pp. Englisch.
Lingua: Inglese
Editore: Springer International Publishing, 2017
ISBN 10: 3319604015 ISBN 13: 9783319604015
Da: moluna, Greven, Germania
EUR 89,99
Quantità: Più di 20 disponibili
Aggiungi al carrelloGebunden. Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Provides novel gain-cell embedded DRAM (GC-eDRAM) designs for various low-power VLSI SoC applicationsModels the statistical retention time distribution of GC-eDRAM and validates the model by silicon measurementsDescribes various memory op.
Lingua: Inglese
Editore: Springer International Publishing Mai 2018, 2018
ISBN 10: 3319868551 ISBN 13: 9783319868554
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
EUR 117,69
Quantità: 2 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy. 156 pp. Englisch.
Da: Majestic Books, Hounslow, Regno Unito
EUR 143,58
Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. Print on Demand.
Lingua: Inglese
Editore: Springer International Publishing, 2018
ISBN 10: 3319868551 ISBN 13: 9783319868554
Da: moluna, Greven, Germania
EUR 98,54
Quantità: Più di 20 disponibili
Aggiungi al carrelloCondizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Provides novel gain-cell embedded DRAM (GC-eDRAM) designs for various low-power VLSI SoC applicationsModels the statistical retention time distribution of GC-eDRAM and validates the model by silicon measurementsDescribes various memory op.
Da: Biblios, Frankfurt am main, HESSE, Germania
EUR 145,03
Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. PRINT ON DEMAND.
Lingua: Inglese
Editore: Springer, Birkhäuser Jul 2017, 2017
ISBN 10: 3319604015 ISBN 13: 9783319604015
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
EUR 106,99
Quantità: 1 disponibili
Aggiungi al carrelloBuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book pioneers the field of gain-cell embedded DRAM (GC-eDRAM) design for low-power VLSI systems-on-chip (SoCs). Novel GC-eDRAMs are specifically designed and optimized for a range of low-power VLSI SoCs, ranging from ultra-low power to power-aware high-performance applications. After a detailed review of prior-art GC-eDRAMs, an analytical retention time distribution model is introduced and validated by silicon measurements, which is key for low-power GC-eDRAM design. The book then investigates supply voltage scaling and near-threshold voltage (NTV) operation of a conventional gain cell (GC), before presenting novel GC circuit and assist techniques for NTV operation, including a 3-transistor full transmission-gate write port, reverse body biasing (RBB), and a replica technique for optimum refresh timing. Next, conventional GC bitcells are evaluated under aggressive technology and voltage scaling (down to the subthreshold domain), before novel bitcells for aggressively scaled CMOS nodes and soft-error tolerance as presented, including a 4-transistor GC with partial internal feedback and a 4-transistor GC with built-in redundancy.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 156 pp. Englisch.
Da: Majestic Books, Hounslow, Regno Unito
EUR 166,20
Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. Print on Demand pp. 146.
Lingua: Inglese
Editore: Springer, Birkhäuser Mai 2018, 2018
ISBN 10: 3319868551 ISBN 13: 9783319868554
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
EUR 117,69
Quantità: 1 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 156 pp. Englisch.
Da: Biblios, Frankfurt am main, HESSE, Germania
EUR 168,47
Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. PRINT ON DEMAND pp. 146.