Importo totale (1 articolo articoli):
Destinazione ordine:
rabab ezz eldin (26 risultati)
Vai alla pagina principale dei risultati di ricerca
Filtri di ricerca
Tipo di articolo
- Tutti i tipi di prodotto
- Libri (26)
- Riviste e Giornali (Nessun altro risultato corrispondente a questo perfezionamento)
- Fumetti (Nessun altro risultato corrispondente a questo perfezionamento)
- Spartiti (Nessun altro risultato corrispondente a questo perfezionamento)
- Arte, Stampe e Poster (Nessun altro risultato corrispondente a questo perfezionamento)
- Fotografie (Nessun altro risultato corrispondente a questo perfezionamento)
- Mappe (Nessun altro risultato corrispondente a questo perfezionamento)
- Manoscritti e Collezionismo cartaceo (Nessun altro risultato corrispondente a questo perfezionamento)
Condizioni Maggiori informazioni
- Nuovo (24)
- Come nuovo, Ottimo o Quasi ottimo (2)
- Molto buono o Buono (Nessun altro risultato corrispondente a questo perfezionamento)
- Discreto o Mediocre (Nessun altro risultato corrispondente a questo perfezionamento)
- Come descritto (Nessun altro risultato corrispondente a questo perfezionamento)
Legatura
Ulteriori caratteristiche
- Prima ed. (1)
- Copia autograf. (Nessun altro risultato corrispondente a questo perfezionamento)
- Sovracoperta (Nessun altro risultato corrispondente a questo perfezionamento)
- Con foto (12)
- Non Print on Demand (13)
Lingua (1)
Prezzo
- Qualsiasi prezzo
- Inferiore a EUR 20 (Nessun altro risultato corrispondente a questo perfezionamento)
- EUR 20 a EUR 40
- Superiore a EUR 40
Spedizione gratuita
- Spedizione gratuita in U.S.A. (Nessun altro risultato corrispondente a questo perfezionamento)
Paese del venditore
Valutazione venditore
-
EUR 33,78
Spedizione EUR 39,90
Spedito da Germania a U.S.A.Quantità: 1 disponibili
Aggiungi al carrelloHardcover. Condizione: As New. 1. Auflage. Unread, like new. Immediately dispatched from Germany.
-
High-Performance and Low-Power Network on Chip Switch
Lingua: Inglese
Editore: LAP LAMBERT Academic Publishing, 2012
ISBN 10: 3848401452 ISBN 13: 9783848401451
EUR 41,67
Spedizione EUR 48,99
Spedito da Germania a U.S.A.Quantità: Più di 20 disponibili
Aggiungi al carrelloCondizione: New.
-
High-Performance and Low-Power Network on Chip Switch | Network on Chip
Lingua: Inglese
Editore: LAP Lambert Academic Publishing, 2012
ISBN 10: 3848401452 ISBN 13: 9783848401451
EUR 43,30
Spedizione EUR 70,00
Spedito da Germania a U.S.A.Quantità: 5 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. High-Performance and Low-Power Network on Chip Switch | Network on Chip | Rabab Ezz-Eldin (u. a.) | Taschenbuch | Englisch | LAP Lambert Academic Publishing | EAN 9783848401451 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Da: Ria Christie Collections, Uxbridge, Regno Unito
Valutazione del venditore 5 su 5 stelle
EUR 114,38
Spedizione EUR 13,84
Spedito da Regno Unito a U.S.A.Quantità: Più di 20 disponibili
Aggiungi al carrelloCondizione: New. In.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Da: Ria Christie Collections, Uxbridge, Regno Unito
Valutazione del venditore 5 su 5 stelle
EUR 114,38
Spedizione EUR 13,84
Spedito da Regno Unito a U.S.A.Quantità: Più di 20 disponibili
Aggiungi al carrelloCondizione: New. In.
-
High-Performance and Low-Power Network on Chip Switch: Network on Chip
Lingua: Inglese
Editore: LAP LAMBERT Academic Publishing, 2012
ISBN 10: 3848401452 ISBN 13: 9783848401451
Da: Mispah books, Redhill, SURRE, Regno Unito
Valutazione del venditore 4 su 5 stelle
EUR 114,21
Spedizione EUR 28,87
Spedito da Regno Unito a U.S.A.Quantità: 1 disponibili
Aggiungi al carrelloPaperback. Condizione: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Da: Books Puddle, New York, NY, U.S.A.
Valutazione del venditore 4 su 5 stelle
Condizione: New. pp. 141.
-
Analysis and Design of Networks on Chip
Da: Books Puddle, New York, NY, U.S.A.
Valutazione del venditore 4 su 5 stelle
Condizione: New. pp. 300.
-
Analysis and Design of Networks-on-chip Under High Process Variation
Da: Revaluation Books, Exeter, Regno Unito
Valutazione del venditore 5 su 5 stelle
EUR 147,98
Spedizione EUR 11,55
Spedito da Regno Unito a U.S.A.Quantità: 2 disponibili
Aggiungi al carrelloPaperback. Condizione: Brand New. reprint edition. 164 pages. 9.25x6.10x0.37 inches. In Stock.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Da: Revaluation Books, Exeter, Regno Unito
Valutazione del venditore 5 su 5 stelle
EUR 149,87
Spedizione EUR 11,55
Spedito da Regno Unito a U.S.A.Quantità: 2 disponibili
Aggiungi al carrelloHardcover. Condizione: Brand New. 9.25x6.25x0.50 inches. In Stock.
-
EUR 95,15
Spedizione EUR 70,00
Spedito da Germania a U.S.A.Quantità: 5 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. Analysis and Design of Networks-on-Chip Under High Process Variation | Rabab Ezz-Eldin (u. a.) | Taschenbuch | xxi | Englisch | 2019 | Springer | EAN 9783319798370 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Lingua: Inglese
Editore: Springer International Publishing, Springer International Publishing, 2019
ISBN 10: 3319798375 ISBN 13: 9783319798370
EUR 106,99
Spedizione EUR 61,30
Spedito da Germania a U.S.A.Quantità: 1 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book describes in detail the impact of process variations on Network-on-Chip (NoC) performance. The authors evaluate various NoC topologies under high process variation and explain the design of efficient NoCs, with advanced technologies. The discussion includes variation in logic and interconnect, in order to evaluate the delay and throughput variation with different NoC topologies. The authors describe an asynchronous router, as a robust design to mitigate the impact of process variation in NoCs and the performance of different routing algorithms is determined with/without process variation for various traffic patterns. Additionally, a novel Process variation Delay and Congestion aware Routing algorithm (PDCR) is described for asynchronous NoC design, which outperforms different adaptive routing algorithms in the average delay and saturation throughput for various traffic patterns.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Lingua: Inglese
Editore: Springer International Publishing, 2015
ISBN 10: 3319257641 ISBN 13: 9783319257648
EUR 106,99
Spedizione EUR 62,09
Spedito da Germania a U.S.A.Quantità: 1 disponibili
Aggiungi al carrelloBuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book describes in detail the impact of process variations on Network-on-Chip (NoC) performance. The authors evaluate various NoC topologies under high process variation and explain the design of efficient NoCs, with advanced technologies. The discussion includes variation in logic and interconnect, in order to evaluate the delay and throughput variation with different NoC topologies. The authors describe an asynchronous router, as a robust design to mitigate the impact of process variation in NoCs and the performance of different routing algorithms is determined with/without process variation for various traffic patterns. Additionally, a novel Process variation Delay and Congestion aware Routing algorithm (PDCR) is described for asynchronous NoC design, which outperforms different adaptive routing algorithms in the average delay and saturation throughput for various traffic patterns.
-
Ezz-Eldin:Analysis and Design of Networ (eng)
Da: Brook Bookstore On Demand, Napoli, NA, Italia
Valutazione del venditore 4 su 5 stelle
EUR 86,24
Spedizione EUR 5,50
Spedito da Italia a U.S.A.Quantità: Più di 20 disponibili
Aggiungi al carrelloCondizione: new. Questo è un articolo print on demand.
-
Ezz-Eldin:Analysis and Design of Networ (eng)
Da: Brook Bookstore On Demand, Napoli, NA, Italia
Valutazione del venditore 4 su 5 stelle
EUR 86,24
Spedizione EUR 5,50
Spedito da Italia a U.S.A.Quantità: Più di 20 disponibili
Aggiungi al carrelloCondizione: new. Questo è un articolo print on demand.
-
High-Performance and Low-Power Network on Chip Switch : Network on Chip
Lingua: Inglese
Editore: LAP Lambert Academic Publishing, 2012
ISBN 10: 3848401452 ISBN 13: 9783848401451
EUR 49,59
Spedizione EUR 60,98
Spedito da Germania a U.S.A.Quantità: 2 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Low leakage power switch is proposed to allow saving in power dissipation of the Network on Chip (NoC). Two power reduction techniques are exploited to design the proposed switch. The proposed NoC switch employs power supply gating to reduce the power dissipation. Adaptive virtual channel (AVC) is proposed as a novel technique to reduce power dissipation of the NoC switch. AVC technique is proposed as an efficient technique to reduce the active area using hierarchical multiplexing tree. Moreover, power gating reduces the average leakage power consumption of proposed switch. The proposed techniques reduce the leakage and dynamic power dissipation of the switch.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Lingua: Inglese
Editore: Springer International Publishing Dez 2015, 2015
ISBN 10: 3319257641 ISBN 13: 9783319257648
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
Valutazione del venditore 5 su 5 stelle
EUR 106,99
Spedizione EUR 23,00
Spedito da Germania a U.S.A.Quantità: 2 disponibili
Aggiungi al carrelloBuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book describes in detail the impact of process variations on Network-on-Chip (NoC) performance. The authors evaluate various NoC topologies under high process variation and explain the design of efficient NoCs, with advanced technologies. The discussion includes variation in logic and interconnect, in order to evaluate the delay and throughput variation with different NoC topologies. The authors describe an asynchronous router, as a robust design to mitigate the impact of process variation in NoCs and the performance of different routing algorithms is determined with/without process variation for various traffic patterns. Additionally, a novel Process variation Delay and Congestion aware Routing algorithm (PDCR) is described for asynchronous NoC design, which outperforms different adaptive routing algorithms in the average delay and saturation throughput for various traffic patterns. 164 pp. Englisch.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Lingua: Inglese
Editore: Springer International Publishing Mrz 2019, 2019
ISBN 10: 3319798375 ISBN 13: 9783319798370
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
Valutazione del venditore 5 su 5 stelle
EUR 106,99
Spedizione EUR 23,00
Spedito da Germania a U.S.A.Quantità: 2 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book describes in detail the impact of process variations on Network-on-Chip (NoC) performance. The authors evaluate various NoC topologies under high process variation and explain the design of efficient NoCs, with advanced technologies. The discussion includes variation in logic and interconnect, in order to evaluate the delay and throughput variation with different NoC topologies. The authors describe an asynchronous router, as a robust design to mitigate the impact of process variation in NoCs and the performance of different routing algorithms is determined with/without process variation for various traffic patterns. Additionally, a novel Process variation Delay and Congestion aware Routing algorithm (PDCR) is described for asynchronous NoC design, which outperforms different adaptive routing algorithms in the average delay and saturation throughput for various traffic patterns. 164 pp. Englisch.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Da: Majestic Books, Hounslow, Regno Unito
Valutazione del venditore 4 su 5 stelle
EUR 136,09
Spedizione EUR 7,51
Spedito da Regno Unito a U.S.A.Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. Print on Demand pp. 141.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Lingua: Inglese
Editore: Springer International Publishing, 2015
ISBN 10: 3319257641 ISBN 13: 9783319257648
EUR 92,27
Spedizione EUR 48,99
Spedito da Germania a U.S.A.Quantità: Più di 20 disponibili
Aggiungi al carrelloGebunden. Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Demonstrates the impact of process variation on Networks-on-Chipof different topologiesIncludes an overview of the synchronous clocking scheme, clockdistribution network, main building blocks in asynchronous NoC design,handshake protocols, data en.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Lingua: Inglese
Editore: Springer International Publishing, 2019
ISBN 10: 3319798375 ISBN 13: 9783319798370
EUR 92,27
Spedizione EUR 48,99
Spedito da Germania a U.S.A.Quantità: Più di 20 disponibili
Aggiungi al carrelloCondizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Demonstrates the impact of process variation on Networks-on-Chipof different topologiesIncludes an overview of the synchronous clocking scheme, clockdistribution network, main building blocks in asynchronous NoC design,handshake protocols, data en.
-
Analysis and Design of Networks on Chip
Da: Majestic Books, Hounslow, Regno Unito
Valutazione del venditore 4 su 5 stelle
EUR 144,35
Spedizione EUR 7,51
Spedito da Regno Unito a U.S.A.Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. Print on Demand pp. 300.
-
Analysis and Design of Networks on Chip
Da: Biblios, Frankfurt am main, HESSE, Germania
Valutazione del venditore 4 su 5 stelle
EUR 148,22
Spedizione EUR 9,95
Spedito da Germania a U.S.A.Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. PRINT ON DEMAND pp. 300.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Da: Biblios, Frankfurt am main, HESSE, Germania
Valutazione del venditore 4 su 5 stelle
EUR 148,83
Spedizione EUR 9,95
Spedito da Germania a U.S.A.Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. PRINT ON DEMAND pp. 141.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Lingua: Inglese
Editore: Springer, Springer Mär 2019, 2019
ISBN 10: 3319798375 ISBN 13: 9783319798370
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
Valutazione del venditore 5 su 5 stelle
EUR 106,99
Spedizione EUR 60,00
Spedito da Germania a U.S.A.Quantità: 1 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book describes in detail the impact of process variations on Network-on-Chip (NoC) performance. The authors evaluate various NoC topologies under high process variation and explain the design of efficient NoCs, with advanced technologies. The discussion includes variation in logic and interconnect, in order to evaluate the delay and throughput variation with different NoC topologies. The authors describe an asynchronous router, as a robust design to mitigate the impact of process variation in NoCs and the performance of different routing algorithms is determined with/without process variation for various traffic patterns. Additionally, a novel Process variation Delay and Congestion aware Routing algorithm (PDCR) is described for asynchronous NoC design, which outperforms different adaptive routing algorithms in the average delay and saturation throughput for various traffic patterns.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 164 pp. Englisch.
-
Analysis and Design of Networks-on-Chip Under High Process Variation
Lingua: Inglese
Editore: Springer, Springer Dez 2015, 2015
ISBN 10: 3319257641 ISBN 13: 9783319257648
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
Valutazione del venditore 5 su 5 stelle
EUR 106,99
Spedizione EUR 60,00
Spedito da Germania a U.S.A.Quantità: 1 disponibili
Aggiungi al carrelloBuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book describes in detail the impact of process variations on Network-on-Chip (NoC) performance. The authors evaluate various NoC topologies under high process variation and explain the design of efficient NoCs, with advanced technologies. The discussion includes variation in logic and interconnect, in order to evaluate the delay and throughput variation with different NoC topologies. The authors describe an asynchronous router, as a robust design to mitigate the impact of process variation in NoCs and the performance of different routing algorithms is determined with/without process variation for various traffic patterns. Additionally, a novel Process variation Delay and Congestion aware Routing algorithm (PDCR) is described for asynchronous NoC design, which outperforms different adaptive routing algorithms in the average delay and saturation throughput for various traffic patterns.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 164 pp. Englisch.
