Sharma krishna gopal (21 risultati)
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Da: Majestic Books, Hounslow, Regno UnitoMajestic Books
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Condizione: New. pp. vii + 129.
Editore: Literary Circle, 2020
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Da: Vedams eBooks (P) Ltd, New Delhi, IndiaVedams eBooks (P) Ltd
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Soft cover. Condizione: New.
Lingua: Inglese
Editore: VDM Verlag Dr. Mueller Aktiengesellschaft & Co. KG, 2013
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Da: Books Puddle, New York, NY, U.S.A.Books Puddle
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Condizione: New. pp. 120.
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Da: preigu, Osnabrück, Germaniapreigu
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Taschenbuch. Condizione: Neu. Low Power Latch Designs in Subthreshold Region | Designs for Portable applications | Krishna Gopal Sharma (u. a.) | Taschenbuch | 80 S. | Englisch | 2012 | LAP LAMBERT Academic Publishing | EAN 9783659160615 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Os…nabrück, mail[at]preigu[dot]de | Anbieter: preigu.
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Da: Revaluation Books, Exeter, Regno UnitoRevaluation Books
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Paperback. Condizione: Brand New. 204 pages. 8.66x5.91x0.46 inches. In Stock.
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Da: Mispah books, Redhill, SURRE, Regno UnitoMispah books
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Paperback. Condizione: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
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Da: Mispah books, Redhill, SURRE, Regno UnitoMispah books
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Paperback. Condizione: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
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Editore: Narendra Publishing House, 2023
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Da: Vedams eBooks (P) Ltd, New Delhi, IndiaVedams eBooks (P) Ltd
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Hardcover. Condizione: New.
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Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermaniaBuchWeltWeit Ludwig Meier e.K.
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Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In recent years, low power design has become one of the focuses of digital VLSI circuits. As technology scales, leakage currents in contemporary CMOS logic have become one of the main power consumers. Contrary to conventional metho…ds for power reduction, operation of digital circuits in the subthreshold region minimizes power consumption in low-frequency systems. This book presents pre-layout and post-layout simulations of existing 8T Latch and proposed latch designs in sub-threshold region. The proposed circuits consist of pass transistor gate logic. Proposed designs are area efficient so useful for portable devices. The proposed designs remarkably reduce power consumption and delay hence reduces power-delay product (PDP). Comparison with the existing design and proposed latch designs are performed at 65nm and 45nm to show technology independence. Comparative simulation results show that proposed 7T latch design with delay is better choice for portable applications. Therefore, the proposed 7T latch design with delay proves to be a viable option for low power and energy efficient applications. 80 pp. Englisch.
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Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermaniaBuchWeltWeit Ludwig Meier e.K.
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Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The decreasing feature size of CMOS circuits and corresponding increase in chip density and operating frequency is the compelling concern of power consumption in VLSI design. The increasing prominence of portable systems and need t…o limit power consumption has led to rapid and innovative developments in low power VLSI design during recent years. In this book, Low power VLSI device design is considered as the main area of research. Interconnects, gates, flip-flops, and latches are the basic building blocks of any complex VLSI system. Operability of the designs is tested for the range of frequencies, supply voltages, and temperatures. Finally, the best designs are proposed. 120 pp. Englisch.
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Da: moluna, Greven, Germaniamoluna
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Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Nehra SumanB.E., M.Tech. (VLSI Design). Currently working as an Assistant Professor in Faculty of Engineering and Technology, MITS, Lakshmangarh, Sikar, Rajasthan, India.The advancement of CMOS technol…ogies paved the road for a g.
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Da: moluna, Greven, Germaniamoluna
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Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Sharma Krishna GopalReceived B.E. degree in E&C from MMM Engineering College, Gorakhpur, and M.Tech. in VLSI Design from MITS, Sikar. He is currently pursuing Ph.D. from SGVU, Jaipur in Low Power VLSI…Device design. He has published .
Lingua: Inglese
Editore: VDM Verlag Dr. Mueller Aktiengesellschaft & Co. KG, 2013
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Da: Majestic Books, Hounslow, Regno UnitoMajestic Books
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EUR 89,93
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Condizione: New. Print on Demand pp. 120 2:B&W 6 x 9 in or 229 x 152 mm Perfect Bound on Creme w/Gloss Lam.
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Da: moluna, Greven, Germaniamoluna
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Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Sharma Krishna GopalReceived B.E. degree in E&C from M.M.M. Engineering College, Gorakhpur and completed M.Tech. in VLSI Design from FET-MITS, Sikar. He has completed his Ph.D. in Low power VLSI design… field. He published research pa.
Lingua: Inglese
Editore: VDM Verlag Dr. Mueller Aktiengesellschaft & Co. KG, 2013
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Da: Biblios, frankfurt am main, HESSE, GermaniaBiblios
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Condizione: New. PRINT ON DEMAND pp. 120.
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Da: moluna, Greven, Germaniamoluna
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Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Suman ShrutiDr. Shruti Suman complited her PhD (Engineering) from Mody University of Science and Technology, Lakshmangarh, Sikar, Rajasthan, India in 2017, M. Tech. (VLSI Design) from Mody Institute of… Technology and Science , Lak.
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Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH
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Taschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - In recent years, low power design has become one of the focuses of digital VLSI circuits. As technology scales, leakage currents in contemporary CMOS logic have become one of the main power consumers. Contrary to conventional methods fo…r power reduction, operation of digital circuits in the subthreshold region minimizes power consumption in low-frequency systems. This book presents pre-layout and post-layout simulations of existing 8T Latch and proposed latch designs in sub-threshold region. The proposed circuits consist of pass transistor gate logic. Proposed designs are area efficient so useful for portable devices. The proposed designs remarkably reduce power consumption and delay hence reduces power-delay product (PDP). Comparison with the existing design and proposed latch designs are performed at 65nm and 45nm to show technology independence. Comparative simulation results show that proposed 7T latch design with delay is better choice for portable applications. Therefore, the proposed 7T latch design with delay proves to be a viable option for low power and energy efficient applications.
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Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germaniabuchversandmimpf2000
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Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In recent years, low power design has become one of the focuses of digital VLSI circuits. As technology scales, leakage currents in contemporary CMOS logic have become one of the main power consumers. Contrary to conventional methods f…or power reduction, operation of digital circuits in the subthreshold region minimizes power consumption in low-frequency systems. This book presents pre-layout and post-layout simulations of existing 8T Latch and proposed latch designs in sub-threshold region. The proposed circuits consist of pass transistor gate logic. Proposed designs are area efficient so useful for portable devices. The proposed designs remarkably reduce power consumption and delay hence reduces power-delay product (PDP). Comparison with the existing design and proposed latch designs are performed at 65nm and 45nm to show technology independence. Comparative simulation results show that proposed 7T latch design with delay is better choice for portable applications. Therefore, the proposed 7T latch design with delay proves to be a viable option for low power and energy efficient applications.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 80 pp. Englisch.
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Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germaniabuchversandmimpf2000
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 54,90
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Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -The decreasing feature size of CMOS circuits and corresponding increase in chip density and operating frequency is the compelling concern of power consumption in VLSI design. The increasing prominence of portable systems and need to li…mit power consumption has led to rapid and innovative developments in low power VLSI design during recent years. In this book, Low power VLSI device design is considered as the main area of research. Interconnects, gates, flip-flops, and latches are the basic building blocks of any complex VLSI system. Operability of the designs is tested for the range of frequencies, supply voltages, and temperatures. Finally, the best designs are proposed.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 120 pp. Englisch.
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Da: preigu, Osnabrück, Germaniapreigu
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EUR 47,20
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Taschenbuch. Condizione: Neu. Device Design in Sub-threshold Region for Ultra Low Power Applications | Krishna Gopal Sharma (u. a.) | Taschenbuch | 120 S. | Englisch | 2013 | LAP LAMBERT Academic Publishing | EAN 9783659170140 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, ma…il[at]preigu[dot]de | Anbieter: preigu Print on Demand.
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Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 54,90
EUR 60,99 spedizioneSpedito da Germania a U.S.A.Quantità: 1 disponibili
Taschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - The decreasing feature size of CMOS circuits and corresponding increase in chip density and operating frequency is the compelling concern of power consumption in VLSI design. The increasing prominence of portable systems and need to lim…it power consumption has led to rapid and innovative developments in low power VLSI design during recent years. In this book, Low power VLSI device design is considered as the main area of research. Interconnects, gates, flip-flops, and latches are the basic building blocks of any complex VLSI system. Operability of the designs is tested for the range of frequencies, supply voltages, and temperatures. Finally, the best designs are proposed.
