Srilatha chepure (4 risultati)
- Brossura
Da: moluna, Greven, Germaniamoluna
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 31,73
EUR 48,99 spedizioneSpedito da Germania a U.S.A.Quantità: Più di 20 disponibili
Condizione: New.
- Brossura
Da: preigu, Osnabrück, Germaniapreigu
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 33,30
EUR 70,00 spedizioneSpedito da Germania a U.S.A.Quantità: 5 disponibili
Taschenbuch. Condizione: Neu. Cache Configuration for High Performance Embedded Systems | Srilatha Chepure (u. a.) | Taschenbuch | Englisch | LAP Lambert Academic Publishing | EAN 9783659392320 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: p…reigu.
- Brossura
Da: Mispah books, Redhill, SURRE, Regno UnitoMispah books
Contatta il venditoreVenditore con 4 stelleCondizione: Usato - Come nuovo
EUR 97,20
EUR 29,13 spedizioneSpedito da Regno Unito a U.S.A.Quantità: 1 disponibili
Paperback. Condizione: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
- Brossura
- Print on Demand
Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 38,43
EUR 30,50 spedizioneSpedito da Germania a U.S.A.Quantità: 2 disponibili
Taschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Embedded computing systems are special-purpose computer systems designed for applications to perform a specific task. With enormous advancements in technology, embedded system applications range from toys to avionics. The design of thes…e systems involve challenging metrics out which performance and power form the most crucial ones. Recent advancements in semiconductor technology have made power consumption also a limiting factor for embedded system design. SRAM being faster than the DRAM, cache memory comprising of SRAM is configured between the CPU and the main memory. The CPU can access the main memory (DRAM) only via the cache memory. Cache memories are employed in all the computing applications along with the processors. The size of cache allowed for inclusion on a chip is limited by the large physical size and large power consumption of the SRAM cells used in cache memory. Hence, its effective configuration for small size and low power consumption is very crucial in embedded system design. An optimal cache configuration technique is presented for the effective reduction of size and high performance. It is also shown that not only the memory module, but also the bus interconnect.
