9781489979278 - digital system test and testable design: using hdl models and architectures di navabi, zainalabedin (13 risultati)
- Brossura
Da: Ria Christie Collections, Uxbridge, Regno UnitoRia Christie Collections
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 91,89
EUR 13,99 spedizioneSpedito da Regno Unito a U.S.A.Quantità: Più di 20 disponibili
Condizione: New. In.
- Brossura
Da: Books Puddle, New York, NY, U.S.A.Books Puddle
Contatta il venditoreVenditore con 4 stelleCondizione: Nuovo
EUR 104,34
EUR 3,49 spedizioneSpedito in U.S.A.Quantità: 1 disponibili
Condizione: New. pp. 452 Softcover reprint of the original 1st ed. 2011 edition NO-PA16APR2015-KAP.
- Brossura
Da: Chiron Media, Wallingford, Regno UnitoChiron Media
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 89,24
EUR 18,09 spedizioneSpedito da Regno Unito a U.S.A.Quantità: 10 disponibili
PF. Condizione: New.
- Brossura
Da: Majestic Books, Hounslow, Regno UnitoMajestic Books
Contatta il venditoreVenditore con 4 stelleCondizione: Nuovo
EUR 105,81
EUR 7,59 spedizioneSpedito da Regno Unito a U.S.A.Quantità: 1 disponibili
Condizione: New. pp. 452.
- Brossura
Da: Revaluation Books, Exeter, Regno UnitoRevaluation Books
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 131,59
EUR 14,60 spedizioneSpedito da Regno Unito a U.S.A.Quantità: 2 disponibili
Paperback. Condizione: Brand New. reprint edition. 435 pages. 10.00x7.01x1.04 inches. In Stock.
- Brossura
Da: preigu, Osnabrück, Germaniapreigu
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 77,30
EUR 70,00 spedizioneSpedito da Germania a U.S.A.Quantità: 5 disponibili
Taschenbuch. Condizione: Neu. Digital System Test and Testable Design | Using HDL Models and Architectures | Zainalabedin Navabi | Taschenbuch | xvii | Englisch | 2016 | Humana | EAN 9781489979278 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]…com | Anbieter: preigu.
- Brossura
Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 90,34
EUR 64,29 spedizioneSpedito da Germania a U.S.A.Quantità: 1 disponibili
Taschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaini…ng fault simulation and test generation algorithms.Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.
- Brossura
Da: Buchpark, Trebbin, GermaniaBuchpark
Contatta il venditoreVenditore con 5 stelleCondizione: Usato - Molto buono
EUR 57,05
EUR 105,00 spedizioneSpedito da Germania a U.S.A.Quantità: 1 disponibili
Condizione: Gut. Zustand: Gut | Seiten: 460 | Sprache: Englisch | Produktart: Bücher | This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and expl…aining fault simulation and test generation algorithms. Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.
- Brossura
- Print on Demand
Da: Brook Bookstore On Demand, Napoli, NA, ItaliaBrook Bookstore On Demand
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 70,24
EUR 8,00 spedizioneSpedito da Italia a U.S.A.Quantità: Più di 20 disponibili
Condizione: new. Questo è un articolo print on demand.
- Brossura
- Print on Demand
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermaniaBuchWeltWeit Ludwig Meier e.K.
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 85,59
EUR 23,00 spedizioneSpedito da Germania a U.S.A.Quantità: 2 disponibili
Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implement…ing and explaining fault simulation and test generation algorithms.Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies. 460 pp. Englisch.
- Brossura
- Print on Demand
Da: moluna, Greven, Germaniamoluna
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 72,89
EUR 48,99 spedizioneSpedito da Germania a U.S.A.Quantità: Più di 20 disponibili
Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. About the AuthorDr. Zainalabedin Navabi is a professor of electrical and computer engineering at Worcester Polytechnic Institute. Dr. Navabi is the author of several textbooks and computer based trainings on VHDL, Ve…rilog and related tools and environments.
- Brossura
- Print on Demand
Da: Biblios, frankfurt am main, HESSE, GermaniaBiblios
Contatta il venditoreVenditore con 4 stelleCondizione: Nuovo
EUR 126,43
EUR 9,95 spedizioneSpedito da Germania a U.S.A.Quantità: 4 disponibili
Condizione: New. PRINT ON DEMAND pp. 452.
- Brossura
- Print on Demand
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germaniabuchversandmimpf2000
Contatta il venditoreVenditore con 5 stelleCondizione: Nuovo
EUR 85,59
EUR 60,00 spedizioneSpedito da Germania a U.S.A.Quantità: 1 disponibili
Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Describes test methods in Verilog and PLI, which makes the methods more understandable and the gates possible to simulateSimulation of gate models allows fault simulation and test generation, while Verilog testbenches inject faults, ev…aluate fault coverage and apply new test patternsDescribes DFT, compression, decompression, and BIST techniques in Verilog, which makes the hardware of the architectures easier to understand and allows simulation and evaluation of the testability methodsSpringer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 460 pp. Englisch.
