Isbn: 9783846588475 - high-k dielectrics and metal gates for memory applications: investigation of high-k dielectrics and metal gate electrodes for floating gate non-volatile memory applications (6 risultati)

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    • Lingua: Inglese

      Editore: LAP LAMBERT Academic Publishing, 2012

      3846588474 / 9783846588475

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      Da: moluna, Greven, Germaniamoluna

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      Paperback. Condizione: Brand New. 252 pages. 8.66x5.91x0.57 inches. In Stock.

    • Lingua: Inglese

      Editore: LAP LAMBERT Academic Publishing, 2012

      3846588474 / 9783846588475

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      Da: Mispah books, Redhill, SURRE, Regno UnitoMispah books

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      Paperback. Condizione: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book.

    • Lingua: Inglese

      Editore: LAP LAMBERT Academic Publishing Feb 2012, 2012

      3846588474 / 9783846588475

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      Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermaniaBuchWeltWeit Ludwig Meier e.K.

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      Taschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Both electrical and analytical characterization studies were undertaken to gain insight into the behavior of the memory layers in the structure. 252 pp. Englisch.

    • Lingua: Inglese

      Editore: LAP LAMBERT Academic Publishing Feb 2012, 2012

      3846588474 / 9783846588475

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      Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germaniabuchversandmimpf2000

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      EUR 79,00

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      Taschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Both electrical and analytical characterization studies were undertaken to gain insight into the behavior of the memory layers in the structure.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 252 pp. Englisch.

    • Lingua: Inglese

      Editore: LAP LAMBERT Academic Publishing, 2012

      3846588474 / 9783846588475

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      • Print on Demand

      Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH

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      Condizione: Nuovo

      EUR 79,00

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      Taschenbuch. Condizione: Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Due to the increasing demand of non-volatile flash memories in the portable electronics, the device structures need to be scaled down drastically. However, the scalability of traditional floating gate structures beyond 20 nm NAND flash technology node is uncertain. In this regard, the use of metal gates and high-k dielectrics as the gate and interpoly dielectrics respectively, seem to be promising substitutes in order to continue the flash scaling beyond 20nm. Furthermore, research of novel memory structures to overcome the scaling challenges need to be explored. Through this work, the use of high-k dielectrics as IPDs in a memory structure has been studied. For this purpose, IPD process optimization and barrier engineering were explored to determine and improve the memory performance. Specifically, the concept of high-k / low-k barrier engineering was studied in corroboration with simulations. In addition, a novel memory structure comprising a continuous metal floating gate was investigated in combination with high-k blocking oxides. Both electrical and analytical characterization studies were undertaken to gain insight into the behavior of the memory layers in the structure.