EUR 77,17
Quantità: Più di 20 disponibili
Aggiungi al carrelloKartoniert / Broschiert. Condizione: New.
Da: Books Puddle, New York, NY, U.S.A.
Condizione: New.
EUR 81,70
Quantità: 5 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. Logic Synthesis and SOC Prototyping | RTL Design using VHDL | Vaibbhav Taraate | Taschenbuch | xix | Englisch | 2021 | Springer | EAN 9789811513169 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.
Lingua: Inglese
Editore: Springer Nature Singapore, Springer Nature Singapore, 2021
ISBN 10: 9811513163 ISBN 13: 9789811513169
Da: AHA-BUCH GmbH, Einbeck, Germania
EUR 95,65
Quantità: 1 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book describes RTL design, synthesis, and timing closure strategies for SOC blocks. It covers high-level RTL design scenarios and challenges for SOC design. The book gives practical information on the issues in SOC and ASIC prototyping using modern high-density FPGAs. The book covers SOC performance improvement techniques, testing, and system-level verification. The book also describes the modern Xilinx FPGA architecture and their use in SOC prototyping. The book covers the Synopsys DC, PT commands, and use of them to constraint and to optimize SOC design. The contents of this book will be of use to students, professionals, and hobbyists alike.
Da: Mispah books, Redhill, SURRE, Regno Unito
EUR 162,48
Quantità: 1 disponibili
Aggiungi al carrelloPaperback. Condizione: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
Da: Brook Bookstore On Demand, Napoli, NA, Italia
EUR 74,24
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Aggiungi al carrelloCondizione: new. Questo è un articolo print on demand.
Lingua: Inglese
Editore: Springer Nature Singapore Jan 2021, 2021
ISBN 10: 9811513163 ISBN 13: 9789811513169
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
EUR 90,94
Quantità: 2 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book describes RTL design, synthesis, and timing closure strategies for SOC blocks. It covers high-level RTL design scenarios and challenges for SOC design. The book gives practical information on the issues in SOC and ASIC prototyping using modern high-density FPGAs. The book covers SOC performance improvement techniques, testing, and system-level verification. The book also describes the modern Xilinx FPGA architecture and their use in SOC prototyping. The book covers the Synopsys DC, PT commands, and use of them to constraint and to optimize SOC design. The contents of this book will be of use to students, professionals, and hobbyists alike. 272 pp. Englisch.
Da: Majestic Books, Hounslow, Regno Unito
EUR 132,65
Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. Print on Demand.
Da: Biblios, Frankfurt am main, HESSE, Germania
EUR 131,97
Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. PRINT ON DEMAND.
Lingua: Inglese
Editore: Springer, Springer Jan 2021, 2021
ISBN 10: 9811513163 ISBN 13: 9789811513169
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
EUR 90,94
Quantità: 1 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Emphasises SOC architecture and micro-architecture design with case studiesConsists of the practical scenarios and issues and helpful to graduate students and professionalsCovers SOC Design, implementation using VHDL, Synthesis and timing analysisCovers key case studies in the generic form for processor, buses, interfaces, memory controllers, DSP and Video controllersSpringer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 272 pp. Englisch.