Condizione: As New. Unread book in perfect condition.
Da: PBShop.store UK, Fairford, GLOS, Regno Unito
EUR 32,82
Quantità: 1 disponibili
Aggiungi al carrelloPAP. Condizione: New. New Book. Shipped from UK. Established seller since 2000.
Condizione: New.
Condizione: New.
Editore: Springer International Publishing AG, CH, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Lingua: Inglese
Da: Rarewaves.com USA, London, LONDO, Regno Unito
Prima edizione
EUR 47,11
Quantità: 1 disponibili
Aggiungi al carrelloPaperback. Condizione: New. 1st. In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and aslowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / Conclusions.
Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 35,43
Quantità: Più di 20 disponibili
Aggiungi al carrelloCondizione: New. In English.
Da: GreatBookPricesUK, Woodford Green, Regno Unito
EUR 32,81
Quantità: 1 disponibili
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Da: GreatBookPricesUK, Woodford Green, Regno Unito
EUR 37,11
Quantità: 1 disponibili
Aggiungi al carrelloCondizione: As New. Unread book in perfect condition.
EUR 37,43
Quantità: 10 disponibili
Aggiungi al carrelloPF. Condizione: New.
Condizione: New. 1st edition NO-PA16APR2015-KAP.
Da: BargainBookStores, Grand Rapids, MI, U.S.A.
Paperback or Softback. Condizione: New. Computer Architecture Techniques for Power-Efficiency. Book.
Editore: Springer, Berlin|Springer International Publishing|Morgan & Claypool|Springer, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Lingua: Inglese
Da: moluna, Greven, Germania
EUR 39,82
Quantità: 1 disponibili
Aggiungi al carrelloCondizione: New. In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating fre.
Editore: Springer International Publishing AG, CH, 2008
ISBN 10: 3031005937 ISBN 13: 9783031005930
Lingua: Inglese
Da: Rarewaves.com UK, London, Regno Unito
Prima edizione
EUR 40,41
Quantità: 1 disponibili
Aggiungi al carrelloPaperback. Condizione: New. 1st. In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and aslowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics. Table of Contents: Introduction / Modeling, Simulation, and Measurement / Using Voltage and Frequency Adjustments to Manage Dynamic Power / Optimizing Capacitance and Switching Activity to Reduce Dynamic Power / Managing Static (Leakage) Power / Conclusions.
Da: Revaluation Books, Exeter, Regno Unito
EUR 38,64
Quantità: 1 disponibili
Aggiungi al carrelloPaperback. Condizione: Brand New. 218 pages. 9.25x7.51x9.25 inches. In Stock. This item is printed on demand.
Da: Majestic Books, Hounslow, Regno Unito
EUR 53,95
Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. Print on Demand.
Da: Biblios, Frankfurt am main, HESSE, Germania
EUR 55,17
Quantità: 4 disponibili
Aggiungi al carrelloCondizione: New. PRINT ON DEMAND.