EUR 40,49
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EUR 39,30
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Aggiungi al carrelloCondizione: New. pp. 312 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.
EUR 40,11
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Da: ALLBOOKS1, Direk, SA, Australia
EUR 93,29
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Aggiungi al carrelloBrand new book. Fast ship. Please provide full street address as we are not able to ship to P O box address.
Da: Basi6 International, Irving, TX, U.S.A.
EUR 96,57
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Aggiungi al carrelloCondizione: Brand New. New. US edition. Expediting shipping for all USA and Europe orders excluding PO Box. Excellent Customer Service.
Da: Romtrade Corp., STERLING HEIGHTS, MI, U.S.A.
EUR 96,57
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Aggiungi al carrelloCondizione: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.
Da: Romtrade Corp., STERLING HEIGHTS, MI, U.S.A.
EUR 100,12
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Aggiungi al carrelloCondizione: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.
Da: SMASS Sellers, IRVING, TX, U.S.A.
EUR 100,83
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Aggiungi al carrelloCondizione: New. Brand New Original US Edition. Customer service! Satisfaction Guaranteed.
Da: ALLBOOKS1, Direk, SA, Australia
EUR 110,78
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Aggiungi al carrelloBrand new book. Fast ship. Please provide full street address as we are not able to ship to P O box address.
Da: GreatBookPrices, Columbia, MD, U.S.A.
EUR 111,08
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Da: Lucky's Textbooks, Dallas, TX, U.S.A.
EUR 112,12
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Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 123,44
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Aggiungi al carrelloCondizione: New. In.
EUR 152,81
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Aggiungi al carrelloCondizione: New. pp. 308.
Da: GreatBookPrices, Columbia, MD, U.S.A.
EUR 159,47
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Da: Lucky's Textbooks, Dallas, TX, U.S.A.
EUR 158,28
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Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 159,00
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Da: GreatBookPricesUK, Woodford Green, Regno Unito
EUR 158,99
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Da: GreatBookPrices, Columbia, MD, U.S.A.
EUR 178,85
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Aggiungi al carrelloCondizione: As New. Unread book in perfect condition.
Da: AHA-BUCH GmbH, Einbeck, Germania
EUR 122,12
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - In the early to mid-1990's while working at what was then Motorola Se- conductor, business changes forced my multi-hundred dollar microprocessor to become a tens-of-dollars embedded core. I ran into first hand the problem of trying to deliver what used to be a whole chip with something on the order of over 400 interconnect signals to a design team that was going to stuff it into a package with less than 220 signal pins and surround it with other logic. I also ran into the problem of delivering microprocessor specification verifi- tion - a microprocessor is not just about the functions and instructions included with the instruction set, but also the MIPs rating at some given f- quency. I faced two dilemmas: one, I could not deliver functional vectors without significant development of off-core logic to deal with the reduced chip I/O map (and everybody's I/O map was going to be a little different); and two, the JTAG (1149. 1) boundary scan ring that was around my core when it was a chip was going to be woefully inadequate since it did not support - speed signal application and capture and independent use separate from my core. I considered the problem at length and came up with my own solution that was predominantly a separate non-JTAG scan test wrapper that supported at-speed application of launch-capture cycles using the system clock. But my problems weren't over at that point either.
Da: GreatBookPricesUK, Woodford Green, Regno Unito
EUR 180,37
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Da: Mispah books, Redhill, SURRE, Regno Unito
EUR 189,67
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Aggiungi al carrelloPaperback. Condizione: Like New. Like New. book.
Da: GreatBookPrices, Columbia, MD, U.S.A.
EUR 221,28
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EUR 178,14
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Aggiungi al carrelloGebunden. Condizione: New. Guides engineers through the process of building a 1500 wrapperProvides insight into the rules and recommendations of IEEE Std. 1500 Focus on practical design considerations inherent to the application of IEEE Std. 1500 by discussing design choice.
Da: AHA-BUCH GmbH, Einbeck, Germania
EUR 247,94
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Aggiungi al carrelloBuch. Condizione: Neu. Neuware - In the early to mid-1990's while working at what was then Motorola Se- conductor, business changes forced my multi-hundred dollar microprocessor to become a tens-of-dollars embedded core. I ran into first hand the problem of trying to deliver what used to be a whole chip with something on the order of over 400 interconnect signals to a design team that was going to stuff it into a package with less than 220 signal pins and surround it with other logic. I also ran into the problem of delivering microprocessor specification verifi- tion - a microprocessor is not just about the functions and instructions included with the instruction set, but also the MIPs rating at some given f- quency. I faced two dilemmas: one, I could not deliver functional vectors without significant development of off-core logic to deal with the reduced chip I/O map (and everybody's I/O map was going to be a little different); and two, the JTAG (1149. 1) boundary scan ring that was around my core when it was a chip was going to be woefully inadequate since it did not support - speed signal application and capture and independent use separate from my core. I considered the problem at length and came up with my own solution that was predominantly a separate non-JTAG scan test wrapper that supported at-speed application of launch-capture cycles using the system clock. But my problems weren't over at that point either.
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
EUR 117,69
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The Core Test Wrapper Handbook: Rationale and Application of IEEE Std. 1500tm provides insight into the rules and recommendations of IEEE Std. 1500. This book focuses on practical design considerations inherent to the application of IEEE Std. 1500 by discussing design choices and other decisions relevant to this IEEE standard. The authors provide background information about some of the choices and decisions made throughout the design of IEEE Std. 1500. 308 pp. Englisch.
Da: moluna, Greven, Germania
EUR 98,54
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Aggiungi al carrelloCondizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Guides engineers through the process of building a 1500 wrapperProvides insight into the rules and recommendations of IEEE Std. 1500 Focus on practical design considerations inherent to the application of IEEE Std. 1500 by discussing design choice.
Da: Majestic Books, Hounslow, Regno Unito
EUR 159,90
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Aggiungi al carrelloCondizione: New. Print on Demand pp. 308.
Da: Biblios, Frankfurt am main, HESSE, Germania
EUR 162,67
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Aggiungi al carrelloCondizione: New. PRINT ON DEMAND pp. 308.
Editore: Springer US, Springer US Okt 2014, 2014
ISBN 10: 148998769X ISBN 13: 9781489987693
Lingua: Inglese
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
EUR 117,69
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In the early to mid-1990's while working at what was then Motorola Se- conductor, business changes forced my multi-hundred dollar microprocessor to become a tens-of-dollars embedded core. I ran into first hand the problem of trying to deliver what used to be a whole chip with something on the order of over 400 interconnect signals to a design team that was going to stuff it into a package with less than 220 signal pins and surround it with other logic. I also ran into the problem of delivering microprocessor specification verifi- tion ¿ a microprocessor is not just about the functions and instructions included with the instruction set, but also the MIPs rating at some given f- quency. I faced two dilemmas: one, I could not deliver functional vectors without significant development of off-core logic to deal with the reduced chip I/O map (and everybody's I/O map was going to be a little different); and two, the JTAG (1149. 1) boundary scan ring that was around my core when it was a chip was going to be woefully inadequate since it did not support - speed signal application and capture and independent use separate from my core. I considered the problem at length and came up with my own solution that was predominantly a separate non-JTAG scan test wrapper that supported at-speed application of launch-capture cycles using the system clock. But my problems weren't over at that point either.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 308 pp. Englisch.