Da: Better World Books, Mishawaka, IN, U.S.A.
EUR 116,96
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Aggiungi al carrelloCondizione: Very Good. Former library book; may include library markings. Used book that is in excellent condition. May show signs of wear or have minor defects.
EUR 136,16
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EUR 136,16
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Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 157,97
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Da: Ria Christie Collections, Uxbridge, Regno Unito
EUR 157,97
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EUR 158,85
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EUR 158,85
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Da: GreatBookPricesUK, Woodford Green, Regno Unito
EUR 157,96
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Editore: Springer US, Springer US Apr 1999, 1999
ISBN 10: 0792384636 ISBN 13: 9780792384632
Lingua: Inglese
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
EUR 160,49
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Aggiungi al carrelloBuch. Condizione: Neu. Neuware -This book is intended to serve as a textbook for a second course in the im plementation (Le. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The target audience consists students in the final year of an undergraduate program or in the first year of a postgraduate program in computer science, computer engineering, or electrical engineering; professional computer designers will also also find the book useful as an introduction to the topics covered. Typically, the author has used the material presented here as the basis of a full-semester undergraduate course or a half-semester post graduate course, with the other half of the latter devoted to multiple-processor machines. The background assumed of the reader is a good first course in computer architecture and implementation - to the level in, say, Computer Organization and Design, by D. Patterson and H. Hennessy - and familiarity with digital-logic design. The book consists of eight chapters: The first chapter is an introduction to all of the main ideas that the following chapters cover in detail: the topics covered are the main forms of pipelining used in high-performance uniprocessors, a taxonomy of the space of pipelined processors, and performance issues. It is also intended that this chapter should be readable as a brief 'stand-alone' survey.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 282 pp. Englisch.
EUR 162,91
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book is intended to serve as a textbook for a second course in the im plementation (Le. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The target audience consists students in the final year of an undergraduate program or in the first year of a postgraduate program in computer science, computer engineering, or electrical engineering; professional computer designers will also also find the book useful as an introduction to the topics covered. Typically, the author has used the material presented here as the basis of a full-semester undergraduate course or a half-semester post graduate course, with the other half of the latter devoted to multiple-processor machines. The background assumed of the reader is a good first course in computer architecture and implementation - to the level in, say, Computer Organization and Design, by D. Patterson and H. Hennessy - and familiarity with digital-logic design. The book consists of eight chapters: The first chapter is an introduction to all of the main ideas that the following chapters cover in detail: the topics covered are the main forms of pipelining used in high-performance uniprocessors, a taxonomy of the space of pipelined processors, and performance issues. It is also intended that this chapter should be readable as a brief 'stand-alone' survey.
EUR 168,73
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Aggiungi al carrelloBuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - This book is intended to serve as a textbook for a second course in the im plementation (Le. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The target audience consists students in the final year of an undergraduate program or in the first year of a postgraduate program in computer science, computer engineering, or electrical engineering; professional computer designers will also also find the book useful as an introduction to the topics covered. Typically, the author has used the material presented here as the basis of a full-semester undergraduate course or a half-semester post graduate course, with the other half of the latter devoted to multiple-processor machines. The background assumed of the reader is a good first course in computer architecture and implementation - to the level in, say, Computer Organization and Design, by D. Patterson and H. Hennessy - and familiarity with digital-logic design. The book consists of eight chapters: The first chapter is an introduction to all of the main ideas that the following chapters cover in detail: the topics covered are the main forms of pipelining used in high-performance uniprocessors, a taxonomy of the space of pipelined processors, and performance issues. It is also intended that this chapter should be readable as a brief 'stand-alone' survey.
Da: GreatBookPricesUK, Woodford Green, Regno Unito
EUR 179,19
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EUR 179,92
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Aggiungi al carrelloCondizione: As New. Unread book in perfect condition.
EUR 190,98
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Aggiungi al carrelloCondizione: New. pp. 284.
EUR 191,74
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Aggiungi al carrelloCondizione: New. pp. 280.
EUR 184,63
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Da: Lucky's Textbooks, Dallas, TX, U.S.A.
EUR 157,67
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Da: Lucky's Textbooks, Dallas, TX, U.S.A.
EUR 157,67
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Da: Revaluation Books, Exeter, Regno Unito
EUR 231,40
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Aggiungi al carrelloPaperback. Condizione: Brand New. 284 pages. 9.25x6.25x0.64 inches. In Stock.
Editore: Springer-Verlag New York Inc., New York, NY, 2010
ISBN 10: 1441950818 ISBN 13: 9781441950819
Lingua: Inglese
Da: Grand Eagle Retail, Mason, OH, U.S.A.
Prima edizione
EUR 180,17
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Aggiungi al carrelloPaperback. Condizione: new. Paperback. The Microarchitecture of Pipelined and Superscalar Computers provides an authoritative treatment of the implementation (i.e. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The book gives a coherent picture of caches, pipelines and their control, and branch prediction. It is the first such publication to treat these topics together. The Microarchitecture of Pipelined and Superscalar Computers covers the fundamentals of the subject by outlining the general principles and ideas. These are then demonstrated by selected case studies taken from practical machines. The Microarchitecture of Pipelined and Superscalar Computers has been specifically developed as a textbook for advanced undergraduate or graduate level instruction. It also makes an invaluable reference for microprocessor design engineers and those seeking to pursue research in the area. The background assumed of the reader is a good first course in computer architecture and implementation - to the level in, say, Computer Organization and Design, by D. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.
Editore: Kluwer Academic Publishers, Dordrecht, 1999
ISBN 10: 0792384636 ISBN 13: 9780792384632
Lingua: Inglese
Da: Grand Eagle Retail, Mason, OH, U.S.A.
EUR 180,17
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Aggiungi al carrelloHardcover. Condizione: new. Hardcover. The Microarchitecture of Pipelined and Superscalar Computers provides an authoritative treatment of the implementation (i.e. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The book gives a coherent picture of caches, pipelines and their control, and branch prediction. It is the first such publication to treat these topics together. The Microarchitecture of Pipelined and Superscalar Computers covers the fundamentals of the subject by outlining the general principles and ideas. These are then demonstrated by selected case studies taken from practical machines. The Microarchitecture of Pipelined and Superscalar Computers has been specifically developed as a textbook for advanced undergraduate or graduate level instruction. It also makes an invaluable reference for microprocessor design engineers and those seeking to pursue research in the area. The background assumed of the reader is a good first course in computer architecture and implementation - to the level in, say, Computer Organization and Design, by D. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.
Editore: Springer-Verlag New York Inc., New York, NY, 2010
ISBN 10: 1441950818 ISBN 13: 9781441950819
Lingua: Inglese
Da: AussieBookSeller, Truganina, VIC, Australia
Prima edizione
EUR 278,52
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Aggiungi al carrelloPaperback. Condizione: new. Paperback. The Microarchitecture of Pipelined and Superscalar Computers provides an authoritative treatment of the implementation (i.e. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The book gives a coherent picture of caches, pipelines and their control, and branch prediction. It is the first such publication to treat these topics together. The Microarchitecture of Pipelined and Superscalar Computers covers the fundamentals of the subject by outlining the general principles and ideas. These are then demonstrated by selected case studies taken from practical machines. The Microarchitecture of Pipelined and Superscalar Computers has been specifically developed as a textbook for advanced undergraduate or graduate level instruction. It also makes an invaluable reference for microprocessor design engineers and those seeking to pursue research in the area. The background assumed of the reader is a good first course in computer architecture and implementation - to the level in, say, Computer Organization and Design, by D. Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability.
Editore: Kluwer Academic Publishers, Dordrecht, 1999
ISBN 10: 0792384636 ISBN 13: 9780792384632
Lingua: Inglese
Da: AussieBookSeller, Truganina, VIC, Australia
EUR 282,48
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Aggiungi al carrelloHardcover. Condizione: new. Hardcover. The Microarchitecture of Pipelined and Superscalar Computers provides an authoritative treatment of the implementation (i.e. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The book gives a coherent picture of caches, pipelines and their control, and branch prediction. It is the first such publication to treat these topics together. The Microarchitecture of Pipelined and Superscalar Computers covers the fundamentals of the subject by outlining the general principles and ideas. These are then demonstrated by selected case studies taken from practical machines. The Microarchitecture of Pipelined and Superscalar Computers has been specifically developed as a textbook for advanced undergraduate or graduate level instruction. It also makes an invaluable reference for microprocessor design engineers and those seeking to pursue research in the area. The background assumed of the reader is a good first course in computer architecture and implementation - to the level in, say, Computer Organization and Design, by D. Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability.
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
EUR 160,49
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Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is intended to serve as a textbook for a second course in the im plementation (Le. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The target audience consists students in the final year of an undergraduate program or in the first year of a postgraduate program in computer science, computer engineering, or electrical engineering; professional computer designers will also also find the book useful as an introduction to the topics covered. Typically, the author has used the material presented here as the basis of a full-semester undergraduate course or a half-semester post graduate course, with the other half of the latter devoted to multiple-processor machines. The background assumed of the reader is a good first course in computer architecture and implementation - to the level in, say, Computer Organization and Design, by D. Patterson and H. Hennessy - and familiarity with digital-logic design. The book consists of eight chapters: The first chapter is an introduction to all of the main ideas that the following chapters cover in detail: the topics covered are the main forms of pipelining used in high-performance uniprocessors, a taxonomy of the space of pipelined processors, and performance issues. It is also intended that this chapter should be readable as a brief 'stand-alone' survey. 280 pp. Englisch.
Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Germania
EUR 160,49
Convertire valutaQuantità: 2 disponibili
Aggiungi al carrelloBuch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book is intended to serve as a textbook for a second course in the im plementation (Le. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The target audience consists students in the final year of an undergraduate program or in the first year of a postgraduate program in computer science, computer engineering, or electrical engineering; professional computer designers will also also find the book useful as an introduction to the topics covered. Typically, the author has used the material presented here as the basis of a full-semester undergraduate course or a half-semester post graduate course, with the other half of the latter devoted to multiple-processor machines. The background assumed of the reader is a good first course in computer architecture and implementation - to the level in, say, Computer Organization and Design, by D. Patterson and H. Hennessy - and familiarity with digital-logic design. The book consists of eight chapters: The first chapter is an introduction to all of the main ideas that the following chapters cover in detail: the topics covered are the main forms of pipelining used in high-performance uniprocessors, a taxonomy of the space of pipelined processors, and performance issues. It is also intended that this chapter should be readable as a brief 'stand-alone' survey. 282 pp. Englisch.
Editore: Springer US, Springer US Dez 2010, 2010
ISBN 10: 1441950818 ISBN 13: 9781441950819
Lingua: Inglese
Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germania
EUR 160,49
Convertire valutaQuantità: 1 disponibili
Aggiungi al carrelloTaschenbuch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book is intended to serve as a textbook for a second course in the im plementation (Le. microarchitecture) of computer architectures. The subject matter covered is the collection of techniques that are used to achieve the highest performance in single-processor machines; these techniques center the exploitation of low-level parallelism (temporal and spatial) in the processing of machine instructions. The target audience consists students in the final year of an undergraduate program or in the first year of a postgraduate program in computer science, computer engineering, or electrical engineering; professional computer designers will also also find the book useful as an introduction to the topics covered. Typically, the author has used the material presented here as the basis of a full-semester undergraduate course or a half-semester post graduate course, with the other half of the latter devoted to multiple-processor machines. The background assumed of the reader is a good first course in computer architecture and implementation - to the level in, say, Computer Organization and Design, by D. Patterson and H. Hennessy - and familiarity with digital-logic design. The book consists of eight chapters: The first chapter is an introduction to all of the main ideas that the following chapters cover in detail: the topics covered are the main forms of pipelining used in high-performance uniprocessors, a taxonomy of the space of pipelined processors, and performance issues. It is also intended that this chapter should be readable as a brief 'stand-alone' survey.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 280 pp. Englisch.
Da: Majestic Books, Hounslow, Regno Unito
EUR 199,17
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Aggiungi al carrelloCondizione: New. Print on Demand pp. 284 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.
Da: Majestic Books, Hounslow, Regno Unito
EUR 201,85
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Aggiungi al carrelloCondizione: New. Print on Demand pp. 280 49:B&W 6.14 x 9.21 in or 234 x 156 mm (Royal 8vo) Perfect Bound on White w/Gloss Lam.
Da: Biblios, Frankfurt am main, HESSE, Germania
EUR 204,27
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Aggiungi al carrelloCondizione: New. PRINT ON DEMAND pp. 284.
Da: Biblios, Frankfurt am main, HESSE, Germania
EUR 205,40
Convertire valutaQuantità: 4 disponibili
Aggiungi al carrelloCondizione: New. PRINT ON DEMAND pp. 280.