Yield Modelling and Defect Tolerance in VLSI, Papers Presented at the INT Workshop on Designing for Yield, 1-3 July 1987, Oxford - Rilegato

Moore, Will; Maly, Wojciech

Rilegato

ISBN 10: 085274398X ISBN 13: 9780852743980

Casa editrice: CRC Press, 1988

Riassunto

Papers of the International Workshop on Designing for Yield, Oxford, July 1987. Objectives include discussion of topics in VLSI and designing integrated circuits to yield targets. On yield loss mechanisms and defect tolerance, alternative prospects, catastrophic yield loss models, parametric yield l

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Contenuti

Preface. Programme committee. List of contributors. Prologue. Yield loss mechanisms and defect tolerance. Alternative perspectives (4 papers). Catastrophic Yield Loss Models (4 papers). Parametric yield loss (3 papers). Defect-tolerant architectures (4 papers). Yield prediction with defect tolerance (4 papers). Testing (3 papers). Index.

Dettagli dell'edizione

• Editore: CRC Press
• Data di pubblicazione: 1988
• Lingua: Inglese
• ISBN 10: 085274398X
• ISBN 13: 9780852743980
• Rilegatura: Copertina rigida
• Numero edizione: 1
• Numero di pagine: 304
• Redattore: Strojwas Andrzej J.
• Contatto del produttore: non disponibile
• Persona responsabile: non disponibile