Titolo: CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies : Process-Aware SRAM Design and Test
Editore: Springer
Data di pubblicazione: 2008
Lingua: Inglese
ISBN 10: 1402083629
ISBN 13: 9781402083624
Rilegatura: Rilegato
Condizione: New

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Riassunto

The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with associated test issues. Purpose: provide process-aware solutions for SRAM design and test challenges.

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Prof. Sachdev has authored several successful books with Springer

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