9780387465463 - defect-oriented testing for nano-metric cmos vlsi circuits: 34 di sachdev, manoj; de gyvez, jose pineda (12 risultati)
Lingua: Inglese
Editore: Springer, 2007
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Da: Solr Books, Lincolnwood, IL, U.S.A.Solr Books
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Condizione: very_good. This book is in Very good condition. There may be a few flaws like shelf wear and some light wear.
Lingua: Inglese
Editore: Springer US, 2007
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Da: Buchpark, Trebbin, GermaniaBuchpark
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Condizione: Sehr gut. Zustand: Sehr gut | Seiten: 352 | Sprache: Englisch | Produktart: Bücher | Defect-oriented testing methods have come a long way from a mere interesting academic exercise to a hard industrial reality. Many factors have contributed to its industrial acceptance. Traditional approaches of testing modern integra…ted circuits have been found to be inadequate in terms of quality and economics of test. In a globally competitive semiconductor market place, overall product quality and economics have become very important objectives. In addition, electronic systems are becoming increasingly complex and demand components of the highest possible quality. Testing in general and defect-oriented testing in particular help in realizing these objectives. For contemporary System on Chip (SoC) VLSI circuits, testing is an activity associated with every level of integration. However, special emphasis is placed for wafer-level test, and final test. Wafer-level test consists primarily of dc or slow-speed tests with current/voltage checks per pin under most operating conditions and with test limits properly adjusted. Basic digital tests are applied and in some cases low-frequency tests to ensure analog/RF functionality are exercised as well. Final test consists of checking device functionality by exercising RF tests and by applying a comprehensive suite of digital test methods such as I , delay fault testing, DDQ stuck-at testing, low-voltage testing, etc. This partitioning choice is actually application dependent.
Lingua: Inglese
Editore: Springer, 2007
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Condizione: New. pp. 352 2nd Edition.
Lingua: Inglese
Editore: Springer, 2007
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Da: Majestic Books, Hounslow, Regno UnitoMajestic Books
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Condizione: New. pp. 352 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.
Lingua: Inglese
Editore: Springer, 2007
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Da: Ria Christie Collections, Uxbridge, Regno UnitoRia Christie Collections
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Condizione: New. In.
Lingua: Inglese
Editore: Springer, 2007
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Hardcover. Condizione: Like New. LIKE NEW. SHIPS FROM MULTIPLE LOCATIONS. book.
Lingua: Inglese
Editore: Springer, 2007
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Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH
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Buch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - Defect-oriented testing methods have come a long way from a mere interesting academic exercise to a hard industrial reality. Many factors have contributed to its industrial acceptance. Traditional approaches of testing modern integrated circuits have bee…n found to be inadequate in terms of quality and economics of test. In a globally competitive semiconductor market place, overall product quality and economics have become very important objectives. In addition, electronic systems are becoming increasingly complex and demand components of the highest possible quality. Testing in general and defect-oriented testing in particular help in realizing these objectives. For contemporary System on Chip (SoC) VLSI circuits, testing is an activity associated with every level of integration. However, special emphasis is placed for wafer-level test, and final test. Wafer-level test consists primarily of dc or slow-speed tests with current/voltage checks per pin under most operating conditions and with test limits properly adjusted. Basic digital tests are applied and in some cases low-frequency tests to ensure analog/RF functionality are exercised as well. Final test consists of checking device functionality by exercising RF tests and by applying a comprehensive suite of digital test methods such as I , delay fault testing, DDQ stuck-at testing, low-voltage testing, etc. This partitioning choice is actually application dependent.
Lingua: Inglese
Editore: Springer Verlag, 2007
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Da: Revaluation Books, Exeter, Regno UnitoRevaluation Books
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Hardcover. Condizione: Brand New. 2nd edition. 328 pages. 9.25x6.25x0.75 inches. In Stock.
Lingua: Inglese
Editore: Springer US, 2007
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Da: moluna, Greven, Germaniamoluna
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Gebunden. Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Wide coverage of topics in test engineeringUnique defect-oriented focus of the materialsIntroduction to yield engineering common practicesThe 2nd edition of defect oriented testing has been extensively upda…ted. New cha.
Lingua: Inglese
Editore: Springer US Jun 2007, 2007
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Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermaniaBuchWeltWeit Ludwig Meier e.K.
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Buch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The 2nd edition of defect oriented testing has been extensively updated. New chapters on Functional, Parametric Defect Models and Inductive fault Analysis and Yield Engineering have been added to provide a link between defect sources and…yield. The chapter on RAM testing has been updated with focus on parametric and SRAM stability testing. Similarly, newer material has been incorporated in digital fault modeling and analog testing chapters. The strength of Defect Oriented Testing for nano-Metric CMOS VLSIs lies in its industrial relevance. 352 pp. Englisch.
Lingua: Inglese
Editore: Springer US, Springer Jun 2007, 2007
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Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germaniabuchversandmimpf2000
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Buch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -Defect-oriented testing methods have come a long way from a mere interesting academic exercise to a hard industrial reality. Many factors have contributed to its industrial acceptance. Traditional approaches of testing modern integrated circu…its have been found to be inadequate in terms of quality and economics of test. In a globally competitive semiconductor market place, overall product quality and economics have become very important objectives. In addition, electronic systems are becoming increasingly complex and demand components of the highest possible quality. Testing in general and defect-oriented testing in particular help in realizing these objectives. For contemporary System on Chip (SoC) VLSI circuits, testing is an activity associated with every level of integration. However, special emphasis is placed for wafer-level test, and final test. Wafer-level test consists primarily of dc or slow-speed tests with current/voltage checks per pin under most operating conditions and with test limits properly adjusted. Basic digital tests are applied and in some cases low-frequency tests to ensure analog/RF functionality are exercised as well. Final test consists of checking device functionality by exercising RF tests and by applying a comprehensive suite of digital test methods such as I , delay fault testing, DDQ stuck-at testing, low-voltage testing, etc. This partitioning choice is actually application dependent.Springer-Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 352 pp. Englisch.
Lingua: Inglese
Editore: Springer, 2007
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Da: Biblios, frankfurt am main, HESSE, GermaniaBiblios
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Condizione: New. PRINT ON DEMAND pp. 352.
