9780792382959 - delay fault testing for vlsi circuits: 14 di krstic, angela; cheng, kwang-ting (13 risultati)

Lingua: Inglese
Editore: Kluwer Academic Pub, Boston 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
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Da: Feldman's Books, Menlo Park, CA, U.S.A.Feldman's Books
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Hardcover. Condizione: Very Fine. First Edition. A very clean, unmarked copy.

Lingua: Inglese
Editore: Springer 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
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Condizione: New. In.

Lingua: Inglese
Editore: Springer US 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
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Da: Buchpark, Trebbin, GermaniaBuchpark
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Condizione: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor process tec…hnology, our expectations on speed have soared. A frequently asked question in the last decade has been how fast can the clock run. This puts significant demands on timing analysis and delay testing. Fueled by the above events, a tremendous growth has occurred in the research on delay testing. Recent work includes fault models, algorithms for test generation and fault simulation, and methods for design and synthesis for testability. The authors of this book, Angela Krstic and Tim Cheng, have personally contributed to this research. Now they do an even greater service to the profession by collecting the work of a large number of researchers. In addition to expounding such a great deal of information, they have delivered it with utmost clarity. To further the reader's understanding many key concepts are illustrated by simple examples. The basic ideas of delay testing have reached a level of maturity that makes them suitable for practice. In that sense, this book is the best x DELAY FAULT TESTING FOR VLSI CIRCUITS available guide for an engineer designing or testing VLSI systems. Tech niques for path delay testing and for use of slower test equipment to test high-speed circuits are of particular interest.

Lingua: Inglese
Editore: Springer 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
- Rilegato
Da: Books Puddle, New York, NY, U.S.A.Books Puddle
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Condizione: New. pp. 212.

Lingua: Inglese
Editore: Kluwer Academic Publishers 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
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Da: Kennys Bookshop and Art Galleries Ltd., Galway, GY, IrlandaKennys Bookshop and Art Galleries Ltd.
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Condizione: New. Presents a selection of existing delay testing research results. This book combines introductory material with techniques that address some of the problems in delay testing. It covers some basic topics such as fault modeling and test application schemes for detecting delay defects. Series: Frontiers in Electroni…c Testing. Num Pages: 203 pages, biography. BIC Classification: TJFD; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 12. Weight in Grams: 1050. . 1998. Hardback. . . . .

Lingua: Inglese
Editore: Springer US, Springer US 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
- Rilegato
Da: AHA-BUCH GmbH, Einbeck, GermaniaAHA-BUCH GmbH
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Buch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor process technology…, our expectations on speed have soared. A frequently asked question in the last decade has been how fast can the clock run. This puts significant demands on timing analysis and delay testing. Fueled by the above events, a tremendous growth has occurred in the research on delay testing. Recent work includes fault models, algorithms for test generation and fault simulation, and methods for design and synthesis for testability. The authors of this book, Angela Krstic and Tim Cheng, have personally contributed to this research. Now they do an even greater service to the profession by collecting the work of a large number of researchers. In addition to expounding such a great deal of information, they have delivered it with utmost clarity. To further the reader's understanding many key concepts are illustrated by simple examples. The basic ideas of delay testing have reached a level of maturity that makes them suitable for practice. In that sense, this book is the best x DELAY FAULT TESTING FOR VLSI CIRCUITS available guide for an engineer designing or testing VLSI systems. Tech niques for path delay testing and for use of slower test equipment to test high-speed circuits are of particular interest.

Lingua: Inglese
Editore: Kluwer Academic Publishers 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
- Rilegato
Da: Kennys Bookstore, Olney, MD, U.S.A.Kennys Bookstore
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Condizione: New. Presents a selection of existing delay testing research results. This book combines introductory material with techniques that address some of the problems in delay testing. It covers some basic topics such as fault modeling and test application schemes for detecting delay defects. Series: Frontiers in Electroni…c Testing. Num Pages: 203 pages, biography. BIC Classification: TJFD; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 12. Weight in Grams: 1050. . 1998. Hardback. . . . . Books ship from the US and Ireland.

Lingua: Inglese
Editore: Springer US Okt 1998 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
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Da: BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, GermaniaBuchWeltWeit Ludwig Meier e.K.
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Buch. Condizione: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor pr…ocess technology, our expectations on speed have soared. A frequently asked question in the last decade has been how fast can the clock run. This puts significant demands on timing analysis and delay testing. Fueled by the above events, a tremendous growth has occurred in the research on delay testing. Recent work includes fault models, algorithms for test generation and fault simulation, and methods for design and synthesis for testability. The authors of this book, Angela Krstic and Tim Cheng, have personally contributed to this research. Now they do an even greater service to the profession by collecting the work of a large number of researchers. In addition to expounding such a great deal of information, they have delivered it with utmost clarity. To further the reader's understanding many key concepts are illustrated by simple examples. The basic ideas of delay testing have reached a level of maturity that makes them suitable for practice. In that sense, this book is the best x DELAY FAULT TESTING FOR VLSI CIRCUITS available guide for an engineer designing or testing VLSI systems. Tech niques for path delay testing and for use of slower test equipment to test high-speed circuits are of particular interest. 212 pp. Englisch.

Lingua: Inglese
Editore: Springer US 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
- Rilegato
- Print on Demand
Da: moluna, Greven, Germaniamoluna
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Gebunden. Condizione: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With impr…ovements in the semiconductor process technology, o.
Altre immaginiLingua: Inglese
Editore: Springer US 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
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Da: preigu, Osnabrück, Germaniapreigu
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Buch. Condizione: Neu. Delay Fault Testing for VLSI Circuits | Kwang-Ting Cheng (u. a.) | Buch | Einband - fest (Hardcover) | Englisch | 1998 | Springer US | EAN 9780792382959 | Verantwortliche Person für die EU: Springer Heidelberg, Tiergartenstr. 17, 69121 Heidelberg, buchhandel-buch[at]springer[dot]com | Anbieter: preigu Prin…t on Demand.

Lingua: Inglese
Editore: Springer US, Springer US Okt 1998 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
- Rilegato
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Da: buchversandmimpf2000, Emtmannsberg, BAYE, Germaniabuchversandmimpf2000
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Buch. Condizione: Neu. This item is printed on demand - Print on Demand Titel. Neuware -In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor proces…s technology, our expectations on speed have soared. A frequently asked question in the last decade has been how fast can the clock run. This puts significant demands on timing analysis and delay testing. Fueled by the above events, a tremendous growth has occurred in the research on delay testing. Recent work includes fault models, algorithms for test generation and fault simulation, and methods for design and synthesis for testability. The authors of this book, Angela Krstic and Tim Cheng, have personally contributed to this research. Now they do an even greater service to the profession by collecting the work of a large number of researchers. In addition to expounding such a great deal of information, they have delivered it with utmost clarity. To further the reader's understanding many key concepts are illustrated by simple examples. The basic ideas of delay testing have reached a level of maturity that makes them suitable for practice. In that sense, this book is the best x DELAY FAULT TESTING FOR VLSI CIRCUITS available guide for an engineer designing or testing VLSI systems. Tech niques for path delay testing and for use of slower test equipment to test high-speed circuits are of particular interest.Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg 212 pp. Englisch.

Lingua: Inglese
Editore: Springer 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
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Da: Majestic Books, Hounslow, Regno UnitoMajestic Books
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Condizione: New. Print on Demand pp. 212 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.

Lingua: Inglese
Editore: Springer 1998
Serie: Frontiers in Electronic Testing, Libro 31 di 40. Libro 31 di 40 - Frontiers in Electronic Testing
- Rilegato
- Print on Demand
Da: Biblios, frankfurt am main, HESSE, GermaniaBiblios
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Condizione: New. PRINT ON DEMAND pp. 212.