Wojciech maly (56 risultati)

Condizione: Good. Pages intact with minimal writing/highlighting. The binding may be loose and creased. Dust jackets/supplements are not included. Stock photo provided. Product includes identifying sticker. Better World Books: Buy Books. Do Good.

Condizione: Bueno. : Este libro trata sobre el diseño VLSI para la fabricación y la mejora del rendimiento. Cubre temas de ingeniería de sistemas e ingeniería informática. Es un recurso en línea que también está disponible en forma impresa. El libro forma parte de 'The Kluwer International Series in Engineering and Computer Science'. EAN: 9781461288169 Tipo: Libros Categoría: Tecnología|Ciencias Título: VLSI Design for Manufacturing: Yield Enhancement Autor: Stephen W. Director| Wojciech Maly| Andrzej J. Strojwas Editorial: Springer US Idioma: en Páginas: 308 Formato: Tapa blanda.…

Hardcover. Condizione: Very Good. Hardcover; fading and light shelf wear to exterior; light fading to page ed ges; otherwise in very good condition with clean text, firm binding.

Condizione: Brand New. New. US edition. Expediting shipping for all USA and Europe orders excluding PO Box. Excellent Customer Service.

Condizione: New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.

hardcover. Condizione: New. In shrink wrap. Looks like an interesting title.

Condizione: good. Supports Goodwill of Silicon Valley job training programs. The cover and pages are in Good condition! Any other included accessories are also in Good condition showing use. Use can include some highlighting and writing, page and cover creases as well as other types visible wear.

Condizione: As New. Unread book in perfect condition.

Condizione: As New. Unread book in perfect condition.

Condizione: Poor. This is an ex-library book and may have the usual library/used-book markings inside.This book has soft covers. In poor condition, suitable as a reading copy. Please note the Image in this listing is a stock photo and may not match the covers of the actual item,700grams, ISBN:0805368507. …

Condizione: New.

Condizione: New.

Condizione: New.

Condizione: New. In English.

Condizione: New. In English.

Condizione: New. States that over the years there has been a large increase in the functionality available on a single integrated circuit. This book focuses on the core of the interface between manufacturing and testing, ie, the contamination-defect-fault relationship. Series: Frontiers in Electronic Testing. Num Pages: 166 pages, biography. BIC Classification: TJFC; TJFD. Category: (P) Professional & Vocational; (XV) Technical / Manuals. Dimension: 234 x 156 x 11. Weight in Grams: 930. . 1996. Hardback. . . . .…

Condizione: As New. Unread book in perfect condition.

Condizione: Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: Bücher | Over the years there has been a large increase in the functionality available on a single integrated circuit. This has been mainly achieved by a continuous drive towards smaller feature sizes, larger dies, and better packing efficiency. However, this greater functionality has also resulted in substantial increases in the capital investment needed to build fabrication facilities. Given such a high level of investment, it is critical for IC manufacturers to reduce manufacturing costs and get a better return on their investment. The most obvious method of reducing the manufacturing cost per die is to improve manufacturing yield. Modern VLSI research and engineering (which includes design manufacturing and testing) encompasses a very broad range of disciplines such as chemistry, physics, material science, circuit design, mathematics and computer science. Due to this diversity, the VLSI arena has become fractured into a number of separate sub-domains with little or no interaction between them. This is the case with the relationships between testing and manufacturing. From Contamination to Defects, Faults and Yield Loss: Simulation and Applications focuses on the core of the interface between manufacturing and testing, i.e., the contamination-defect-fault relationship. The understanding of this relationship can lead to better solutions of many manufacturing and testing problems. Failure mechanism models are developed and presented which can be used to accurately estimate probability of different failures for a given IC. This information is critical in solving key yield-related applications such as failure analysis, fault modeling and design manufacturing.…

Condizione: New. pp. 172.

Buch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - Over the years there has been a large increase in the functionality available on a single integrated circuit. This has been mainly achieved by a continuous drive towards smaller feature sizes, larger dies, and better packing efficiency. However, this greater functionality has also resulted in substantial increases in the capital investment needed to build fabrication facilities. Given such a high level of investment, it is critical for IC manufacturers to reduce manufacturing costs and get a better return on their investment. The most obvious method of reducing the manufacturing cost per die is to improve manufacturing yield. Modern VLSI research and engineering (which includes design manufacturing and testing) encompasses a very broad range of disciplines such as chemistry, physics, material science, circuit design, mathematics and computer science. Due to this diversity, the VLSI arena has become fractured into a number of separate sub-domains with little or no interaction between them. This is the case with the relationships between testing and manufacturing. From Contamination to Defects, Faults and Yield Loss: Simulation and Applications focuses on the core of the interface between manufacturing and testing, i.e., the contamination-defect-fault relationship. The understanding of this relationship can lead to better solutions of many manufacturing and testing problems. Failure mechanism models are developed and presented which can be used to accurately estimate probability of different failures for a given IC. This information is critical in solving key yield-related applications such as failure analysis, fault modeling and design manufacturing.…

Taschenbuch. Condizione: Neu. Druck auf Anfrage Neuware - Printed after ordering - Over the years there has been a large increase in the functionality available on a single integrated circuit. This has been mainly achieved by a continuous drive towards smaller feature sizes, larger dies, and better packing efficiency. However, this greater functionality has also resulted in substantial increases in the capital investment needed to build fabrication facilities. Given such a high level of investment, it is critical for IC manufacturers to reduce manufacturing costs and get a better return on their investment. The most obvious method of reducing the manufacturing cost per die is to improve manufacturing yield. Modern VLSI research and engineering (which includes design manufacturing and testing) encompasses a very broad range of disciplines such as chemistry, physics, material science, circuit design, mathematics and computer science. Due to this diversity, the VLSI arena has become fractured into a number of separate sub-domains with little or no interaction between them. This is the case with the relationships between testing and manufacturing. From Contamination to Defects, Faults and Yield Loss: Simulation and Applications focuses on the core of the interface between manufacturing and testing, i.e., the contamination-defect-fault relationship. The understanding of this relationship can lead to better solutions of many manufacturing and testing problems. Failure mechanism models are developed and presented which can be used to accurately estimate probability of different failures for a given IC. This information is critical in solving key yield-related applications such as failure analysis, fault modeling and design manufacturing.…

Condizione: New.

Condizione: New. States that over the years there has been a large increase in the functionality available on a single integrated circuit. This book focuses on the core of the interface between manufacturing and testing, ie, the contamination-defect-fault relationship. Series: Frontiers in Electronic Testing. Num Pages: 166 pages, biography. BIC Classification: TJFC; TJFD. Category: (P) Professional & Vocational; (XV) Technical / Manuals. Dimension: 234 x 156 x 11. Weight in Grams: 930. . 1996. Hardback. . . . . Books ship from the US and Ireland.…

Condizione: New.

Condizione: As New. Unread book in perfect condition.

Condizione: As New. Unread book in perfect condition.

Condizione: New. In English.

Condizione: New. In English.

Condizione: New.

Condizione: New. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 292 pages, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 234 x 156 x 19. Weight in Grams: 609. . 1989. Hardback. . . . . …