Wang laung terng (21 risultati)

Condizione: good. A copy that has been read, remains in good condition. All pages are intact, and the cover is intact. The spine and cover show signs of wear. Pages can include notes and highlighting and show signs of wear, and the copy can include "From the library of" labels or previous owner inscriptions. 100% GUARANTEE! Shipped with delivery confirmation, if you're not satisfied with purchase please return item! Ships via media mail.…

Hardcover. Condizione: Good. Connecting readers with great books since 1972! Used textbooks may not include companion materials such as access codes, etc. May have some wear or writing/highlighting. We ship orders daily and Customer Service is our top priority.

Hardcover. Condizione: Very Good. 1. It's a well-cared-for item that has seen limited use. The item may show minor signs of wear. All the text is legible, with all pages included. It may have slight markings and/or highlighting.

Condizione: acceptable. Fairly worn, but readable and intact. If applicable: Dust jacket, disc or access code may not be included.

Condizione: good. The book is in good condition with all pages and cover intact, including the dust jacket if originally issued. The spine may show light wear. Pages may contain some notes or highlighting, and there might be a "From the library of" label. Boxed set packaging, shrink wrap, or included media like CDs may be missing.…

Hardcover. Condizione: Very Good. 1. It's a well-cared-for item that has seen limited use. The item may show minor signs of wear. All the text is legible, with all pages included. It may have slight markings and/or highlighting.

Condizione: Gut. 777 S. Einband hinten leicht eingedrückt. Schnitt unten dezent fleckig. Mit Bibliothek-Stempel. 518 Sprache: Englisch Gewicht in Gramm: 1800 Gebundene Ausgabe, Maße: 20.62 cm x 5.23 cm x 23.83 cm.

Hardcover. Condizione: new. Hardcover. System-on-Chip Test Architectures A guide to VLSI Testing and Design-for-Testability techniques that allows students, researchers, DFT practitioners, and VLSI designers to master System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs. It also includes practical problems at the end of each chapter for students. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. …

Hardcover. Condizione: new. New Copy. Customer Service Guaranteed.

hardcover. Condizione: New. Special order direct from the distributor.

Condizione: New. A guide to VLSI Testing and Design-for-Testability techniques that allows students, researchers, DFT practitioners, and VLSI designers to master System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs. It also includes practical problems at the end of each chapter for students. Series: Systems on Silicon. Num Pages: 896 pages, Approx. 600 illustrations. BIC Classification: THR. Category: (P) Professional & Vocational. Dimension: 242 x 199 x 38. Weight in Grams: 1602. . 2007. 1st Edition. hardcover. . . . .…

Condizione: good. A copy that has been read, remains in good condition. All pages are intact, and the cover is intact. The spine and cover show signs of wear. Pages can include notes and highlighting and show signs of wear, and the copy can include "From the library of" labels or previous owner inscriptions. 100% GUARANTEE! Shipped with delivery confirmation, if you're not satisfied with purchase please return item! Ships via media mail.…

hardcover. Condizione: New. In shrink wrap. Looks like an interesting title.

Paperback. Condizione: Brand New. 1st edition. 808 pages. 9.35x7.50x1.83 inches. In Stock.

Condizione: New. A guide to VLSI Testing and Design-for-Testability techniques that allows students, researchers, DFT practitioners, and VLSI designers to master System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs. It also includes practical problems at the end of each chapter for students. Series: Systems on Silicon. Num Pages: 896 pages, Approx. 600 illustrations. BIC Classification: THR. Category: (P) Professional & Vocational. Dimension: 242 x 199 x 38. Weight in Grams: 1602. . 2007. 1st Edition. hardcover. . . . . Books ship from the US and Ireland.…

Condizione: New. Emphasizes VLSI Test principles and Design for Testability architectures, with numerous illustrations/examples. Most up-to-date coverage available, including Fault Tolerance, Low-Power Testing, Defect and Error Tolerance, Network-on-Chip (.

Hardcover. Condizione: Brand New. illustrated edition. 896 pages. 9.50x7.50x1.50 inches. In Stock.

Hardcover. Condizione: Brand New. 1st edition. 777 pages. 9.25x7.50x2.00 inches. In Stock.

Hardcover. Condizione: new. Hardcover. System-on-Chip Test Architectures A guide to VLSI Testing and Design-for-Testability techniques that allows students, researchers, DFT practitioners, and VLSI designers to master System-on-Chip Test architectures, for test debug and diagnosis of digital, memory, and analog/mixed-signal designs. It also includes practical problems at the end of each chapter for students. Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability. …

Condizione: gut. 2006. VLSI Test Principles and Architectures: Design for Testability (The Morgan Kaufmann Series In Systems On Silicon) In englischer Sprache. pages.

Paperback. Condizione: New. NEW. SHIPS FROM MULTIPLE LOCATIONS. book.